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cometzeroSylwester Nawrocki
cometzero
authored and
Sylwester Nawrocki
committed
clk: samsung: exynosautov9: add cmu_peric1 clock support
Like CMU_PERIC0, this provides clocks for USI06 ~ USI11 and USI_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-10-chanho61.park@samsung.com
1 parent f2dd366 commit b35f27f

1 file changed

Lines changed: 254 additions & 0 deletions

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‎drivers/clk/samsung/clk-exynosautov9.c‎

Lines changed: 254 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1385,6 +1385,257 @@ static const struct samsung_cmu_info peric0_cmu_info __initconst = {
13851385
.clk_name = "dout_clkcmu_peric0_bus",
13861386
};
13871387

1388+
/* ---- CMU_PERIC1 --------------------------------------------------------- */
1389+
1390+
/* Register Offset definitions for CMU_PERIC1 (0x10800000) */
1391+
#define PLL_CON0_MUX_CLKCMU_PERIC1_BUS_USER 0x0600
1392+
#define PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER 0x0610
1393+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI06_USI 0x1000
1394+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI07_USI 0x1004
1395+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI08_USI 0x1008
1396+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI 0x100c
1397+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI 0x1010
1398+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI 0x1014
1399+
#define CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C 0x1018
1400+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI06_USI 0x1800
1401+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI07_USI 0x1804
1402+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI08_USI 0x1808
1403+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI 0x180c
1404+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI 0x1810
1405+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI 0x1814
1406+
#define CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C 0x1818
1407+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_0 0x2014
1408+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_1 0x2018
1409+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_2 0x2024
1410+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_3 0x2028
1411+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_4 0x202c
1412+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_5 0x2030
1413+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_6 0x2034
1414+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_7 0x2038
1415+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_8 0x203c
1416+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_9 0x2040
1417+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_10 0x201c
1418+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_11 0x2020
1419+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_0 0x2044
1420+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_1 0x2048
1421+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2 0x2058
1422+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3 0x205c
1423+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4 0x2060
1424+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7 0x206c
1425+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5 0x2064
1426+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6 0x2068
1427+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8 0x2070
1428+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9 0x2074
1429+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_10 0x204c
1430+
#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_11 0x2050
1431+
1432+
static const unsigned long peric1_clk_regs[] __initconst = {
1433+
PLL_CON0_MUX_CLKCMU_PERIC1_BUS_USER,
1434+
PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER,
1435+
CLK_CON_MUX_MUX_CLK_PERIC1_USI06_USI,
1436+
CLK_CON_MUX_MUX_CLK_PERIC1_USI07_USI,
1437+
CLK_CON_MUX_MUX_CLK_PERIC1_USI08_USI,
1438+
CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI,
1439+
CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI,
1440+
CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI,
1441+
CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C,
1442+
CLK_CON_DIV_DIV_CLK_PERIC1_USI06_USI,
1443+
CLK_CON_DIV_DIV_CLK_PERIC1_USI07_USI,
1444+
CLK_CON_DIV_DIV_CLK_PERIC1_USI08_USI,
1445+
CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI,
1446+
CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI,
1447+
CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI,
1448+
CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C,
1449+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_0,
1450+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_1,
1451+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_2,
1452+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_3,
1453+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_4,
1454+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_5,
1455+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_6,
1456+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_7,
1457+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_8,
1458+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_9,
1459+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_10,
1460+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_11,
1461+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_0,
1462+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_1,
1463+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2,
1464+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3,
1465+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4,
1466+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7,
1467+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5,
1468+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6,
1469+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8,
1470+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9,
1471+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_10,
1472+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_11,
1473+
};
1474+
1475+
/* List of parent clocks for Muxes in CMU_PERIC1 */
1476+
PNAME(mout_peric1_bus_user_p) = { "oscclk", "dout_clkcmu_peric1_bus" };
1477+
PNAME(mout_peric1_ip_user_p) = { "oscclk", "dout_clkcmu_peric1_ip" };
1478+
PNAME(mout_peric1_usi_p) = { "oscclk", "mout_peric1_ip_user" };
1479+
1480+
static const struct samsung_mux_clock peric1_mux_clks[] __initconst = {
1481+
MUX(CLK_MOUT_PERIC1_BUS_USER, "mout_peric1_bus_user",
1482+
mout_peric1_bus_user_p, PLL_CON0_MUX_CLKCMU_PERIC1_BUS_USER, 4, 1),
1483+
MUX(CLK_MOUT_PERIC1_IP_USER, "mout_peric1_ip_user",
1484+
mout_peric1_ip_user_p, PLL_CON0_MUX_CLKCMU_PERIC1_IP_USER, 4, 1),
1485+
/* USI06 ~ USI11 */
1486+
MUX(CLK_MOUT_PERIC1_USI06_USI, "mout_peric1_usi06_usi",
1487+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI06_USI, 0, 1),
1488+
MUX(CLK_MOUT_PERIC1_USI07_USI, "mout_peric1_usi07_usi",
1489+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI07_USI, 0, 1),
1490+
MUX(CLK_MOUT_PERIC1_USI08_USI, "mout_peric1_usi08_usi",
1491+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI08_USI, 0, 1),
1492+
MUX(CLK_MOUT_PERIC1_USI09_USI, "mout_peric1_usi09_usi",
1493+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI09_USI, 0, 1),
1494+
MUX(CLK_MOUT_PERIC1_USI10_USI, "mout_peric1_usi10_usi",
1495+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI10_USI, 0, 1),
1496+
MUX(CLK_MOUT_PERIC1_USI11_USI, "mout_peric1_usi11_usi",
1497+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI11_USI, 0, 1),
1498+
/* USI_I2C */
1499+
MUX(CLK_MOUT_PERIC1_USI_I2C, "mout_peric1_usi_i2c",
1500+
mout_peric1_usi_p, CLK_CON_MUX_MUX_CLK_PERIC1_USI_I2C, 0, 1),
1501+
};
1502+
1503+
static const struct samsung_div_clock peric1_div_clks[] __initconst = {
1504+
/* USI06 ~ USI11 */
1505+
DIV(CLK_DOUT_PERIC1_USI06_USI, "dout_peric1_usi06_usi",
1506+
"mout_peric1_usi06_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI06_USI,
1507+
0, 4),
1508+
DIV(CLK_DOUT_PERIC1_USI07_USI, "dout_peric1_usi07_usi",
1509+
"mout_peric1_usi07_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI07_USI,
1510+
0, 4),
1511+
DIV(CLK_DOUT_PERIC1_USI08_USI, "dout_peric1_usi08_usi",
1512+
"mout_peric1_usi08_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI08_USI,
1513+
0, 4),
1514+
DIV(CLK_DOUT_PERIC1_USI09_USI, "dout_peric1_usi09_usi",
1515+
"mout_peric1_usi09_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI09_USI,
1516+
0, 4),
1517+
DIV(CLK_DOUT_PERIC1_USI10_USI, "dout_peric1_usi10_usi",
1518+
"mout_peric1_usi10_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI10_USI,
1519+
0, 4),
1520+
DIV(CLK_DOUT_PERIC1_USI11_USI, "dout_peric1_usi11_usi",
1521+
"mout_peric1_usi11_usi", CLK_CON_DIV_DIV_CLK_PERIC1_USI11_USI,
1522+
0, 4),
1523+
/* USI_I2C */
1524+
DIV(CLK_DOUT_PERIC1_USI_I2C, "dout_peric1_usi_i2c",
1525+
"mout_peric1_usi_i2c", CLK_CON_DIV_DIV_CLK_PERIC1_USI_I2C, 0, 4),
1526+
};
1527+
1528+
static const struct samsung_gate_clock peric1_gate_clks[] __initconst = {
1529+
/* IPCLK */
1530+
GATE(CLK_GOUT_PERIC1_IPCLK_0, "gout_peric1_ipclk_0",
1531+
"dout_peric1_usi06_usi",
1532+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_0,
1533+
21, 0, 0),
1534+
GATE(CLK_GOUT_PERIC1_IPCLK_1, "gout_peric1_ipclk_1",
1535+
"dout_peric1_usi_i2c",
1536+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_1,
1537+
21, 0, 0),
1538+
GATE(CLK_GOUT_PERIC1_IPCLK_2, "gout_peric1_ipclk_2",
1539+
"dout_peric1_usi07_usi",
1540+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_2,
1541+
21, 0, 0),
1542+
GATE(CLK_GOUT_PERIC1_IPCLK_3, "gout_peric1_ipclk_3",
1543+
"dout_peric1_usi_i2c",
1544+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_3,
1545+
21, 0, 0),
1546+
GATE(CLK_GOUT_PERIC1_IPCLK_4, "gout_peric1_ipclk_4",
1547+
"dout_peric1_usi08_usi",
1548+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_4,
1549+
21, 0, 0),
1550+
GATE(CLK_GOUT_PERIC1_IPCLK_5, "gout_peric1_ipclk_5",
1551+
"dout_peric1_usi_i2c",
1552+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_5,
1553+
21, 0, 0),
1554+
GATE(CLK_GOUT_PERIC1_IPCLK_6, "gout_peric1_ipclk_6",
1555+
"dout_peric1_usi09_usi",
1556+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_6,
1557+
21, 0, 0),
1558+
GATE(CLK_GOUT_PERIC1_IPCLK_7, "gout_peric1_ipclk_7",
1559+
"dout_peric1_usi_i2c",
1560+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_7,
1561+
21, 0, 0),
1562+
GATE(CLK_GOUT_PERIC1_IPCLK_8, "gout_peric1_ipclk_8",
1563+
"dout_peric1_usi10_usi",
1564+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_8,
1565+
21, 0, 0),
1566+
GATE(CLK_GOUT_PERIC1_IPCLK_9, "gout_peric1_ipclk_9",
1567+
"dout_peric1_usi_i2c",
1568+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_9,
1569+
21, 0, 0),
1570+
GATE(CLK_GOUT_PERIC1_IPCLK_10, "gout_peric1_ipclk_10",
1571+
"dout_peric1_usi11_usi",
1572+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_10,
1573+
21, 0, 0),
1574+
GATE(CLK_GOUT_PERIC1_IPCLK_11, "gout_peric1_ipclk_11",
1575+
"dout_peric1_usi_i2c",
1576+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_11,
1577+
21, 0, 0),
1578+
1579+
/* PCLK */
1580+
GATE(CLK_GOUT_PERIC1_PCLK_0, "gout_peric1_pclk_0",
1581+
"mout_peric1_bus_user",
1582+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_0,
1583+
21, 0, 0),
1584+
GATE(CLK_GOUT_PERIC1_PCLK_2, "gout_peric1_pclk_2",
1585+
"mout_peric1_bus_user",
1586+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2,
1587+
21, 0, 0),
1588+
GATE(CLK_GOUT_PERIC1_PCLK_3, "gout_peric1_pclk_3",
1589+
"mout_peric1_bus_user",
1590+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3,
1591+
21, 0, 0),
1592+
GATE(CLK_GOUT_PERIC1_PCLK_4, "gout_peric1_pclk_4",
1593+
"mout_peric1_bus_user",
1594+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4,
1595+
21, 0, 0),
1596+
GATE(CLK_GOUT_PERIC1_PCLK_5, "gout_peric1_pclk_5",
1597+
"mout_peric1_bus_user",
1598+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5,
1599+
21, 0, 0),
1600+
GATE(CLK_GOUT_PERIC1_PCLK_6, "gout_peric1_pclk_6",
1601+
"mout_peric1_bus_user",
1602+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6,
1603+
21, 0, 0),
1604+
GATE(CLK_GOUT_PERIC1_PCLK_7, "gout_peric1_pclk_7",
1605+
"mout_peric1_bus_user",
1606+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7,
1607+
21, 0, 0),
1608+
GATE(CLK_GOUT_PERIC1_PCLK_8, "gout_peric1_pclk_8",
1609+
"mout_peric1_bus_user",
1610+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8,
1611+
21, 0, 0),
1612+
GATE(CLK_GOUT_PERIC1_PCLK_9, "gout_peric1_pclk_9",
1613+
"mout_peric1_bus_user",
1614+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9,
1615+
21, 0, 0),
1616+
GATE(CLK_GOUT_PERIC1_PCLK_10, "gout_peric1_pclk_10",
1617+
"mout_peric1_bus_user",
1618+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_10,
1619+
21, 0, 0),
1620+
GATE(CLK_GOUT_PERIC1_PCLK_11, "gout_peric1_pclk_11",
1621+
"mout_peric1_bus_user",
1622+
CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_11,
1623+
21, 0, 0),
1624+
};
1625+
1626+
static const struct samsung_cmu_info peric1_cmu_info __initconst = {
1627+
.mux_clks = peric1_mux_clks,
1628+
.nr_mux_clks = ARRAY_SIZE(peric1_mux_clks),
1629+
.div_clks = peric1_div_clks,
1630+
.nr_div_clks = ARRAY_SIZE(peric1_div_clks),
1631+
.gate_clks = peric1_gate_clks,
1632+
.nr_gate_clks = ARRAY_SIZE(peric1_gate_clks),
1633+
.nr_clk_ids = PERIC1_NR_CLK,
1634+
.clk_regs = peric1_clk_regs,
1635+
.nr_clk_regs = ARRAY_SIZE(peric1_clk_regs),
1636+
.clk_name = "dout_clkcmu_peric1_bus",
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};
1638+
13881639
/* ---- CMU_PERIS ---------------------------------------------------------- */
13891640

13901641
/* Register Offset definitions for CMU_PERIS (0x10020000) */
@@ -1456,6 +1707,9 @@ static const struct of_device_id exynosautov9_cmu_of_match[] = {
14561707
}, {
14571708
.compatible = "samsung,exynosautov9-cmu-peric0",
14581709
.data = &peric0_cmu_info,
1710+
}, {
1711+
.compatible = "samsung,exynosautov9-cmu-peric1",
1712+
.data = &peric1_cmu_info,
14591713
}, {
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.compatible = "samsung,exynosautov9-cmu-peris",
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.data = &peris_cmu_info,

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