Skip to content

Commit b7c182f

Browse files
Wolfram Sanggeertu
authored andcommitted
arm64: dts: renesas: r8a779f0: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
1 parent 65be6f4 commit b7c182f

1 file changed

Lines changed: 160 additions & 0 deletions

File tree

arch/arm64/boot/dts/renesas/r8a779f0.dtsi

Lines changed: 160 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1297,6 +1297,166 @@
12971297
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
12981298
};
12991299

1300+
wwdt0: watchdog@ffc90000 {
1301+
compatible = "renesas,r8a779f0-wwdt",
1302+
"renesas,rcar-gen4-wwdt";
1303+
reg = <0 0xffc90000 0 0x10>;
1304+
interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>,
1305+
<GIC_SPI 493 IRQ_TYPE_LEVEL_HIGH>;
1306+
interrupt-names = "pretimeout", "error";
1307+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1308+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1309+
clock-names = "cnt", "bus";
1310+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1311+
resets = <&cpg 1200>, <&cpg 1318>;
1312+
reset-names = "cnt", "bus";
1313+
status = "disabled";
1314+
};
1315+
1316+
wwdt1: watchdog@ffca0000 {
1317+
compatible = "renesas,r8a779f0-wwdt",
1318+
"renesas,rcar-gen4-wwdt";
1319+
reg = <0 0xffca0000 0 0x10>;
1320+
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
1321+
<GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>;
1322+
interrupt-names = "pretimeout", "error";
1323+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1324+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1325+
clock-names = "cnt", "bus";
1326+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1327+
resets = <&cpg 1201>, <&cpg 1319>;
1328+
reset-names = "cnt", "bus";
1329+
status = "disabled";
1330+
};
1331+
1332+
wwdt2: watchdog@ffcb0000 {
1333+
compatible = "renesas,r8a779f0-wwdt",
1334+
"renesas,rcar-gen4-wwdt";
1335+
reg = <0 0xffcb0000 0 0x10>;
1336+
interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH>,
1337+
<GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH>;
1338+
interrupt-names = "pretimeout", "error";
1339+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1340+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1341+
clock-names = "cnt", "bus";
1342+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1343+
resets = <&cpg 1202>, <&cpg 1320>;
1344+
reset-names = "cnt", "bus";
1345+
status = "disabled";
1346+
};
1347+
1348+
wwdt3: watchdog@ffcc0000 {
1349+
compatible = "renesas,r8a779f0-wwdt",
1350+
"renesas,rcar-gen4-wwdt";
1351+
reg = <0 0xffcc0000 0 0x10>;
1352+
interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
1353+
<GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
1354+
interrupt-names = "pretimeout", "error";
1355+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1356+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1357+
clock-names = "cnt", "bus";
1358+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1359+
resets = <&cpg 1203>, <&cpg 1321>;
1360+
reset-names = "cnt", "bus";
1361+
status = "disabled";
1362+
};
1363+
1364+
wwdt4: watchdog@ffcf0000 {
1365+
compatible = "renesas,r8a779f0-wwdt",
1366+
"renesas,rcar-gen4-wwdt";
1367+
reg = <0 0xffcf0000 0 0x10>;
1368+
interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH>,
1369+
<GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
1370+
interrupt-names = "pretimeout", "error";
1371+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1372+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1373+
clock-names = "cnt", "bus";
1374+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1375+
resets = <&cpg 1204>, <&cpg 1322>;
1376+
reset-names = "cnt", "bus";
1377+
status = "disabled";
1378+
};
1379+
1380+
wwdt5: watchdog@ffef0000 {
1381+
compatible = "renesas,r8a779f0-wwdt",
1382+
"renesas,rcar-gen4-wwdt";
1383+
reg = <0 0xffef0000 0 0x10>;
1384+
interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
1385+
<GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH>;
1386+
interrupt-names = "pretimeout", "error";
1387+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1388+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1389+
clock-names = "cnt", "bus";
1390+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1391+
resets = <&cpg 1205>, <&cpg 1323>;
1392+
reset-names = "cnt", "bus";
1393+
status = "disabled";
1394+
};
1395+
1396+
wwdt6: watchdog@fff10000 {
1397+
compatible = "renesas,r8a779f0-wwdt",
1398+
"renesas,rcar-gen4-wwdt";
1399+
reg = <0 0xfff10000 0 0x10>;
1400+
interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
1401+
<GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>;
1402+
interrupt-names = "pretimeout", "error";
1403+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1404+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1405+
clock-names = "cnt", "bus";
1406+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1407+
resets = <&cpg 1206>, <&cpg 1324>;
1408+
reset-names = "cnt", "bus";
1409+
status = "disabled";
1410+
};
1411+
1412+
wwdt7: watchdog@fff20000 {
1413+
compatible = "renesas,r8a779f0-wwdt",
1414+
"renesas,rcar-gen4-wwdt";
1415+
reg = <0 0xfff20000 0 0x10>;
1416+
interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
1417+
<GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
1418+
interrupt-names = "pretimeout", "error";
1419+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1420+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1421+
clock-names = "cnt", "bus";
1422+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1423+
resets = <&cpg 1207>, <&cpg 1325>;
1424+
reset-names = "cnt", "bus";
1425+
status = "disabled";
1426+
};
1427+
1428+
wwdt8: watchdog@fff30000 {
1429+
compatible = "renesas,r8a779f0-wwdt",
1430+
"renesas,rcar-gen4-wwdt";
1431+
reg = <0 0xfff30000 0 0x10>;
1432+
interrupts = <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>,
1433+
<GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
1434+
interrupt-names = "pretimeout", "error";
1435+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1436+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1437+
clock-names = "cnt", "bus";
1438+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1439+
resets = <&cpg 1208>, <&cpg 1326>;
1440+
reset-names = "cnt", "bus";
1441+
status = "disabled";
1442+
};
1443+
1444+
wwdt9: watchdog@fff40000 {
1445+
compatible = "renesas,r8a779f0-wwdt",
1446+
"renesas,rcar-gen4-wwdt";
1447+
reg = <0 0xfff40000 0 0x10>;
1448+
interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
1449+
<GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>;
1450+
interrupt-names = "pretimeout", "error";
1451+
clocks = <&cpg CPG_CORE R8A779F0_CLK_R>,
1452+
<&cpg CPG_CORE R8A779F0_CLK_SASYNCRT>;
1453+
clock-names = "cnt", "bus";
1454+
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1455+
resets = <&cpg 1209>, <&cpg 1327>;
1456+
reset-names = "cnt", "bus";
1457+
status = "disabled";
1458+
};
1459+
13001460
prr: chipid@fff00044 {
13011461
compatible = "renesas,prr";
13021462
reg = <0 0xfff00044 0 4>;

0 commit comments

Comments
 (0)