Skip to content

Commit bd2dc32

Browse files
krzkandersson
authored andcommitted
arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts
Complete interrupts for DWC3 node to match what is required by Devicetree bindings, as reported by dtbs_check: ipq9574-rdp433.dtb: usb@8af8800 (qcom,ipq9574-dwc3): interrupt-names: ['pwr_event'] is too short The actual interrupt numbers are taken from reference manual of similar chip, but not IPQ9574, due to lack of access to it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Tested-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106185123.19929-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
1 parent d106f96 commit bd2dc32

1 file changed

Lines changed: 8 additions & 2 deletions

File tree

arch/arm64/boot/dts/qcom/ipq9574.dtsi

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -765,8 +765,14 @@
765765
assigned-clock-rates = <200000000>,
766766
<24000000>;
767767

768-
interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
769-
interrupt-names = "pwr_event";
768+
interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
769+
<&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
770+
<&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
771+
<&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
772+
interrupt-names = "pwr_event",
773+
"qusb2_phy",
774+
"dm_hs_phy_irq",
775+
"dp_hs_phy_irq";
770776

771777
resets = <&gcc GCC_USB_BCR>;
772778
status = "disabled";

0 commit comments

Comments
 (0)