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miquelraynalmiquelraynal
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Merge branch 'nand/next' into mtd/next
2 parents efd2ed9 + ad5c18c commit cf431a5

26 files changed

Lines changed: 759 additions & 263 deletions

‎Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml‎

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@@ -49,13 +49,12 @@ properties:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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reg:
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minimum: 0
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maximum: 7
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nand-ecc-mode: true
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nand-ecc-algo:
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const: bch
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@@ -75,7 +74,7 @@ patternProperties:
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minimum: 0
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maximum: 1
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additionalProperties: false
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unevaluatedProperties: false
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required:
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- compatible

‎Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml‎

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@@ -40,6 +40,7 @@ properties:
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patternProperties:
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"^nand@[0-7]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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reg:
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minimum: 0
@@ -58,6 +59,14 @@ patternProperties:
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meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
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meson-axg-nfc 8
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nand-rb:
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maxItems: 1
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items:
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maximum: 0
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unevaluatedProperties: false
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required:
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- compatible
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- reg
@@ -87,6 +96,7 @@ examples:
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nand@0 {
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reg = <0>;
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nand-rb = <0>;
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};
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};
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‎Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml‎

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@@ -114,6 +114,7 @@ properties:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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compatible:
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const: brcm,nandcs
@@ -136,6 +137,8 @@ patternProperties:
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layout.
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$ref: /schemas/types.yaml#/definitions/uint32
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unevaluatedProperties: false
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allOf:
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- $ref: nand-controller.yaml#
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- if:

‎Documentation/devicetree/bindings/mtd/denali,nand.yaml‎

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@@ -63,6 +63,12 @@ properties:
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minItems: 1
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maxItems: 2
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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unevaluatedProperties: false
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allOf:
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- $ref: nand-controller.yaml
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@@ -74,7 +80,6 @@ allOf:
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:

‎Documentation/devicetree/bindings/mtd/ingenic,nand.yaml‎

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@@ -39,7 +39,9 @@ properties:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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rb-gpios:
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description: GPIO specifier for the busy pin.
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maxItems: 1
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description: GPIO specifier for the write-protect pin.
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maxItems: 1
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unevaluatedProperties: false
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required:
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- compatible
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- reg

‎Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml‎

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@@ -42,17 +42,16 @@ properties:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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reg:
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minimum: 0
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maximum: 1
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nand-ecc-mode: true
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nand-ecc-algo:
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const: hw
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additionalProperties: false
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unevaluatedProperties: false
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required:
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- compatible

‎Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell NAND Flash Controller (NFC)
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maintainers:
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- Miquel Raynal <miquel.raynal@bootlin.com>
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properties:
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compatible:
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oneOf:
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- items:
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- const: marvell,armada-8k-nand-controller
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- const: marvell,armada370-nand-controller
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- enum:
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- marvell,armada370-nand-controller
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- marvell,pxa3xx-nand-controller
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- description: legacy bindings
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deprecated: true
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enum:
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- marvell,armada-8k-nand
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- marvell,armada370-nand
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- marvell,pxa3xx-nand
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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description:
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Shall reference the NAND controller clocks, the second one is
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is only needed for the Armada 7K/8K SoCs
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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items:
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- const: core
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- const: reg
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dmas:
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maxItems: 1
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dma-names:
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items:
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- const: data
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marvell,system-controller:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Syscon node that handles NAND controller related registers
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58+
patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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63+
properties:
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reg:
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minimum: 0
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maximum: 3
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68+
nand-rb:
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items:
70+
- minimum: 0
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maximum: 1
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73+
nand-ecc-step-size:
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const: 512
75+
76+
nand-ecc-strength:
77+
enum: [1, 4, 8, 12, 16]
78+
79+
nand-ecc-mode:
80+
const: hw
81+
82+
marvell,nand-keep-config:
83+
$ref: /schemas/types.yaml#/definitions/flag
84+
description:
85+
Orders the driver not to take the timings from the core and
86+
leaving them completely untouched. Bootloader timings will then
87+
be used.
88+
89+
marvell,nand-enable-arbiter:
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$ref: /schemas/types.yaml#/definitions/flag
91+
description:
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To enable the arbiter, all boards blindly used it,
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this bit was set by the bootloader for many boards and even if
94+
it is marked reserved in several datasheets, it might be needed to set
95+
it (otherwise it is harmless).
96+
deprecated: true
97+
98+
required:
99+
- reg
100+
- nand-rb
101+
102+
unevaluatedProperties: false
103+
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required:
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- compatible
106+
- reg
107+
- interrupts
108+
- clocks
109+
110+
allOf:
111+
- $ref: nand-controller.yaml#
112+
113+
- if:
114+
properties:
115+
compatible:
116+
contains:
117+
const: marvell,pxa3xx-nand-controller
118+
then:
119+
required:
120+
- dmas
121+
- dma-names
122+
123+
- if:
124+
properties:
125+
compatible:
126+
contains:
127+
const: marvell,armada-8k-nand-controller
128+
then:
129+
properties:
130+
clocks:
131+
minItems: 2
132+
133+
clock-names:
134+
minItems: 2
135+
136+
required:
137+
- marvell,system-controller
138+
139+
else:
140+
properties:
141+
clocks:
142+
minItems: 1
143+
144+
clock-names:
145+
minItems: 1
146+
147+
148+
unevaluatedProperties: false
149+
150+
examples:
151+
- |
152+
#include <dt-bindings/interrupt-controller/arm-gic.h>
153+
nand_controller: nand-controller@d0000 {
154+
compatible = "marvell,armada370-nand-controller";
155+
reg = <0xd0000 0x54>;
156+
#address-cells = <1>;
157+
#size-cells = <0>;
158+
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
159+
clocks = <&coredivclk 0>;
160+
161+
nand@0 {
162+
reg = <0>;
163+
label = "main-storage";
164+
nand-rb = <0>;
165+
nand-ecc-mode = "hw";
166+
marvell,nand-keep-config;
167+
nand-on-flash-bbt;
168+
nand-ecc-strength = <4>;
169+
nand-ecc-step-size = <512>;
170+
171+
partitions {
172+
compatible = "fixed-partitions";
173+
#address-cells = <1>;
174+
#size-cells = <1>;
175+
176+
partition@0 {
177+
label = "Rootfs";
178+
reg = <0x00000000 0x40000000>;
179+
};
180+
};
181+
};
182+
};
183+
184+
- |
185+
cp0_nand_controller: nand-controller@720000 {
186+
compatible = "marvell,armada-8k-nand-controller",
187+
"marvell,armada370-nand-controller";
188+
reg = <0x720000 0x54>;
189+
#address-cells = <1>;
190+
#size-cells = <0>;
191+
interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
192+
clock-names = "core", "reg";
193+
clocks = <&cp0_clk 1 2>,
194+
<&cp0_clk 1 17>;
195+
marvell,system-controller = <&cp0_syscon0>;
196+
197+
nand@0 {
198+
reg = <0>;
199+
label = "main-storage";
200+
nand-rb = <0>;
201+
nand-ecc-mode = "hw";
202+
nand-ecc-strength = <8>;
203+
nand-ecc-step-size = <512>;
204+
};
205+
};
206+
207+
- |
208+
nand-controller@43100000 {
209+
compatible = "marvell,pxa3xx-nand-controller";
210+
reg = <0x43100000 90>;
211+
interrupts = <45>;
212+
clocks = <&clks 1>;
213+
clock-names = "core";
214+
dmas = <&pdma 97 3>;
215+
dma-names = "data";
216+
#address-cells = <1>;
217+
#size-cells = <0>;
218+
nand@0 {
219+
reg = <0>;
220+
nand-rb = <0>;
221+
nand-ecc-mode = "hw";
222+
marvell,nand-keep-config;
223+
};
224+
};
225+
226+
...

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