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arm64: dts: qcom: fix indentation
Correct indentation to use only tabs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416101134.95686-1-krzysztof.kozlowski@linaro.org
1 parent 033553c commit f34fbb7

8 files changed

Lines changed: 80 additions & 80 deletions

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‎arch/arm64/boot/dts/qcom/msm8996.dtsi‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -53,8 +53,8 @@
5353
#cooling-cells = <2>;
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next-level-cache = <&L2_0>;
5555
L2_0: l2-cache {
56-
compatible = "cache";
57-
cache-level = <2>;
56+
compatible = "cache";
57+
cache-level = <2>;
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};
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};
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@@ -83,8 +83,8 @@
8383
#cooling-cells = <2>;
8484
next-level-cache = <&L2_1>;
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L2_1: l2-cache {
86-
compatible = "cache";
87-
cache-level = <2>;
86+
compatible = "cache";
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cache-level = <2>;
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};
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};
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‎arch/arm64/boot/dts/qcom/sc8280xp.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -60,8 +60,8 @@
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cache-level = <2>;
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
63-
compatible = "cache";
64-
cache-level = <3>;
63+
compatible = "cache";
64+
cache-level = <3>;
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};
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};
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};

‎arch/arm64/boot/dts/qcom/sdm670.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
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compatible = "cache";
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
45-
compatible = "cache";
45+
compatible = "cache";
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};
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};
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};

‎arch/arm64/boot/dts/qcom/sdm845.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -110,8 +110,8 @@
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cache-level = <2>;
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
113-
compatible = "cache";
114-
cache-level = <3>;
113+
compatible = "cache";
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cache-level = <3>;
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};
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};
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};

‎arch/arm64/boot/dts/qcom/sm6375.dtsi‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -48,10 +48,10 @@
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_0: l2-cache {
51-
compatible = "cache";
52-
next-level-cache = <&L3_0>;
51+
compatible = "cache";
52+
next-level-cache = <&L3_0>;
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L3_0: l3-cache {
54-
compatible = "cache";
54+
compatible = "cache";
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};
5656
};
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};
@@ -68,8 +68,8 @@
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_100: l2-cache {
71-
compatible = "cache";
72-
next-level-cache = <&L3_0>;
71+
compatible = "cache";
72+
next-level-cache = <&L3_0>;
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};
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};
7575

@@ -85,8 +85,8 @@
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_200: l2-cache {
88-
compatible = "cache";
89-
next-level-cache = <&L3_0>;
88+
compatible = "cache";
89+
next-level-cache = <&L3_0>;
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};
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};
9292

@@ -102,8 +102,8 @@
102102
power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_300: l2-cache {
105-
compatible = "cache";
106-
next-level-cache = <&L3_0>;
105+
compatible = "cache";
106+
next-level-cache = <&L3_0>;
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};
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};
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@@ -119,8 +119,8 @@
119119
power-domain-names = "psci";
120120
#cooling-cells = <2>;
121121
L2_400: l2-cache {
122-
compatible = "cache";
123-
next-level-cache = <&L3_0>;
122+
compatible = "cache";
123+
next-level-cache = <&L3_0>;
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};
125125
};
126126

@@ -136,8 +136,8 @@
136136
power-domain-names = "psci";
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#cooling-cells = <2>;
138138
L2_500: l2-cache {
139-
compatible = "cache";
140-
next-level-cache = <&L3_0>;
139+
compatible = "cache";
140+
next-level-cache = <&L3_0>;
141141
};
142142
};
143143

@@ -153,8 +153,8 @@
153153
power-domain-names = "psci";
154154
#cooling-cells = <2>;
155155
L2_600: l2-cache {
156-
compatible = "cache";
157-
next-level-cache = <&L3_0>;
156+
compatible = "cache";
157+
next-level-cache = <&L3_0>;
158158
};
159159
};
160160

@@ -170,8 +170,8 @@
170170
power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_700: l2-cache {
173-
compatible = "cache";
174-
next-level-cache = <&L3_0>;
173+
compatible = "cache";
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next-level-cache = <&L3_0>;
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};
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};
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‎arch/arm64/boot/dts/qcom/sm8150.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -65,8 +65,8 @@
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cache-level = <2>;
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
68-
compatible = "cache";
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cache-level = <3>;
68+
compatible = "cache";
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cache-level = <3>;
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};
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};
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};

‎arch/arm64/boot/dts/qcom/sm8350.dtsi‎

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -58,12 +58,12 @@
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_0: l2-cache {
61-
compatible = "cache";
62-
cache-level = <2>;
63-
next-level-cache = <&L3_0>;
61+
compatible = "cache";
62+
cache-level = <2>;
63+
next-level-cache = <&L3_0>;
6464
L3_0: l3-cache {
65-
compatible = "cache";
66-
cache-level = <3>;
65+
compatible = "cache";
66+
cache-level = <3>;
6767
};
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};
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};
@@ -80,9 +80,9 @@
8080
power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_100: l2-cache {
83-
compatible = "cache";
84-
cache-level = <2>;
85-
next-level-cache = <&L3_0>;
83+
compatible = "cache";
84+
cache-level = <2>;
85+
next-level-cache = <&L3_0>;
8686
};
8787
};
8888

@@ -98,9 +98,9 @@
9898
power-domain-names = "psci";
9999
#cooling-cells = <2>;
100100
L2_200: l2-cache {
101-
compatible = "cache";
102-
cache-level = <2>;
103-
next-level-cache = <&L3_0>;
101+
compatible = "cache";
102+
cache-level = <2>;
103+
next-level-cache = <&L3_0>;
104104
};
105105
};
106106

@@ -116,9 +116,9 @@
116116
power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_300: l2-cache {
119-
compatible = "cache";
120-
cache-level = <2>;
121-
next-level-cache = <&L3_0>;
119+
compatible = "cache";
120+
cache-level = <2>;
121+
next-level-cache = <&L3_0>;
122122
};
123123
};
124124

@@ -134,9 +134,9 @@
134134
power-domain-names = "psci";
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#cooling-cells = <2>;
136136
L2_400: l2-cache {
137-
compatible = "cache";
138-
cache-level = <2>;
139-
next-level-cache = <&L3_0>;
137+
compatible = "cache";
138+
cache-level = <2>;
139+
next-level-cache = <&L3_0>;
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};
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};
142142

@@ -152,9 +152,9 @@
152152
power-domain-names = "psci";
153153
#cooling-cells = <2>;
154154
L2_500: l2-cache {
155-
compatible = "cache";
156-
cache-level = <2>;
157-
next-level-cache = <&L3_0>;
155+
compatible = "cache";
156+
cache-level = <2>;
157+
next-level-cache = <&L3_0>;
158158
};
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};
160160

@@ -170,9 +170,9 @@
170170
power-domain-names = "psci";
171171
#cooling-cells = <2>;
172172
L2_600: l2-cache {
173-
compatible = "cache";
174-
cache-level = <2>;
175-
next-level-cache = <&L3_0>;
173+
compatible = "cache";
174+
cache-level = <2>;
175+
next-level-cache = <&L3_0>;
176176
};
177177
};
178178

@@ -188,9 +188,9 @@
188188
power-domain-names = "psci";
189189
#cooling-cells = <2>;
190190
L2_700: l2-cache {
191-
compatible = "cache";
192-
cache-level = <2>;
193-
next-level-cache = <&L3_0>;
191+
compatible = "cache";
192+
cache-level = <2>;
193+
next-level-cache = <&L3_0>;
194194
};
195195
};
196196

‎arch/arm64/boot/dts/qcom/sm8450.dtsi‎

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -57,12 +57,12 @@
5757
#cooling-cells = <2>;
5858
clocks = <&cpufreq_hw 0>;
5959
L2_0: l2-cache {
60-
compatible = "cache";
61-
cache-level = <2>;
62-
next-level-cache = <&L3_0>;
60+
compatible = "cache";
61+
cache-level = <2>;
62+
next-level-cache = <&L3_0>;
6363
L3_0: l3-cache {
64-
compatible = "cache";
65-
cache-level = <3>;
64+
compatible = "cache";
65+
cache-level = <3>;
6666
};
6767
};
6868
};
@@ -79,9 +79,9 @@
7979
#cooling-cells = <2>;
8080
clocks = <&cpufreq_hw 0>;
8181
L2_100: l2-cache {
82-
compatible = "cache";
83-
cache-level = <2>;
84-
next-level-cache = <&L3_0>;
82+
compatible = "cache";
83+
cache-level = <2>;
84+
next-level-cache = <&L3_0>;
8585
};
8686
};
8787

@@ -97,9 +97,9 @@
9797
#cooling-cells = <2>;
9898
clocks = <&cpufreq_hw 0>;
9999
L2_200: l2-cache {
100-
compatible = "cache";
101-
cache-level = <2>;
102-
next-level-cache = <&L3_0>;
100+
compatible = "cache";
101+
cache-level = <2>;
102+
next-level-cache = <&L3_0>;
103103
};
104104
};
105105

@@ -115,9 +115,9 @@
115115
#cooling-cells = <2>;
116116
clocks = <&cpufreq_hw 0>;
117117
L2_300: l2-cache {
118-
compatible = "cache";
119-
cache-level = <2>;
120-
next-level-cache = <&L3_0>;
118+
compatible = "cache";
119+
cache-level = <2>;
120+
next-level-cache = <&L3_0>;
121121
};
122122
};
123123

@@ -133,9 +133,9 @@
133133
#cooling-cells = <2>;
134134
clocks = <&cpufreq_hw 1>;
135135
L2_400: l2-cache {
136-
compatible = "cache";
137-
cache-level = <2>;
138-
next-level-cache = <&L3_0>;
136+
compatible = "cache";
137+
cache-level = <2>;
138+
next-level-cache = <&L3_0>;
139139
};
140140
};
141141

@@ -151,9 +151,9 @@
151151
#cooling-cells = <2>;
152152
clocks = <&cpufreq_hw 1>;
153153
L2_500: l2-cache {
154-
compatible = "cache";
155-
cache-level = <2>;
156-
next-level-cache = <&L3_0>;
154+
compatible = "cache";
155+
cache-level = <2>;
156+
next-level-cache = <&L3_0>;
157157
};
158158
};
159159

@@ -169,9 +169,9 @@
169169
#cooling-cells = <2>;
170170
clocks = <&cpufreq_hw 1>;
171171
L2_600: l2-cache {
172-
compatible = "cache";
173-
cache-level = <2>;
174-
next-level-cache = <&L3_0>;
172+
compatible = "cache";
173+
cache-level = <2>;
174+
next-level-cache = <&L3_0>;
175175
};
176176
};
177177

@@ -187,9 +187,9 @@
187187
#cooling-cells = <2>;
188188
clocks = <&cpufreq_hw 2>;
189189
L2_700: l2-cache {
190-
compatible = "cache";
191-
cache-level = <2>;
192-
next-level-cache = <&L3_0>;
190+
compatible = "cache";
191+
cache-level = <2>;
192+
next-level-cache = <&L3_0>;
193193
};
194194
};
195195

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