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Merge tag 'imx-dt64-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree for 6.10: - New board support: Emcraft Systems NavQ+ Kit, Toradex Colibri iMX8DX, and S32G-VNP-RDB3 board. - A series from Alexander Stein that adds empty DSI output endpoint to simplify DSI connection description at board level. - Add pinmux and I2C GPIOs to support bus recovery for LX2160A. - Add cm40 subsystem description for i.MX8 SoCs. - A series from Frank Li that adds ADC, LPSPI and FlexSPI devices for imx8qm-mek board. - Add audio devices ASRC, ESAI, SPDIF and SAI for i.MX8QXP and correct audio LPCG index. - A couple of changes from Ghennadi Procopciuc that add SCMI firmware and uSDHC nodes for S32G SoC. - A couple of imx8mp-msc-sm2s updates from Ian Ray improving I2C pad drive strength and adding SDA/SCL GPIOs for I2C devices. - Add PCA9451A PMIC and PCF2131 RTC support for imx93-11x11-evk board. - A series from Lucas Stach to enable HDMI display support for i.MX8MP. - A series from Peng Fan to improve i.MX93 support for LPI2C, LPSPI, FEC and eQoS. - A couple of LS1028A changes from Rob Herring to improve PCI device description. - A series from Shengjiu Wang adding HDMI and PDM mic sound support for imx8mp-evk board. - A number of i.MX8M Venice device improvements from Stefan Eichenberger, Tim Harvey and Vitor Soares. - A series from Xu Yang that enables USB support for imx8ulp-evk and imx93-11x11-evk board. - Other small and random updates on various boards. * tag 'imx-dt64-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (78 commits) arm64: dts: imx93-11x11-evk: add RTC PCF2131 support arm64: dts: imx93-11x11-evk: add reset gpios for ethernet PHYs arm64: dts: imx93-11x11-evk: add sleep pinctrl for sdhc2 arm64: dts: imx93-11x11-evk: add different usdhc pinctrl for different timing usage arm64: dts: imx93-11x11-evk: add sleep pinctrl for eqos and fec arm64: dts: imx93-11x11-evk: update resource table address arm64: dts: imx93: add nvmem property for eqos arm64: dts: imx93: add nvmem property for fec1 arm64: dts: imx93: assign usdhc[1..3] root clock to 400MHz arm64: dts: imx93: add dma support for lpspi[1..8] arm64: dts: imx93: add dma support for lpi2c[1..8] arm64: dts: imx93: use FSL_EDMA_RX for rx channel arm64: dts: freescale: ls1028a: Add standard PCI device compatible strings to ENETC arm64: dts: freescale: ls1028a: Fix embedded PCI interrupt mapping arm64: dts: imx8qxp-mek: add cm40_i2c, wm8960 and sai[0,1,4,5] arm64: dts: imx8mp: Align both CSI2 pixel clock arm64: dts: freescale: imx8m[mp]-verdin: Update audio card name arm64: dts: imx8mp: Enable HDMI on TQMa8MPxL/MBa8MPxL arm64: dts: imx8ulp: add caam jr arm64: dts: imx8mp-msc-sm2s: Add i2c{1,6} sda-/scl-gpios ... Link: https://lore.kernel.org/r/20240428121247.10370-4-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 7194048 + 8005c3e commit f71b3cf

68 files changed

Lines changed: 3022 additions & 131 deletions

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‎arch/arm64/boot/dts/freescale/Makefile‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb
99
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb
1010
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb
1111
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb
12+
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3.dtb
1213
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb
1314
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb
1415
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
@@ -98,6 +99,10 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-11-x.dtb
9899
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x.dtb
99100
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x.dtb
100101

102+
dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-aster.dtb
103+
dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-eval-v3.dtb
104+
dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris-v2.dtb
105+
dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris.dtb
101106
dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb
102107
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
103108
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
@@ -166,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
166171
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
167172
dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
168173
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
174+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
169175
dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
170176
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
171177
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
@@ -259,4 +265,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx-rpidsi.dtb
259265

260266
dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
261267
dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
268+
dtb-$(CONFIG_ARCH_S32) += s32g399a-rdb3.dtb
262269
dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb

‎arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
/dts-v1/;
1111

1212
#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13-
#include "fsl-ls1028a-kontron-sl28.dts"
13+
#include "fsl-ls1028a-kontron-sl28-var3.dts"
1414

1515
/ {
1616
model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier";

‎arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3.dts‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
// SPDX-License-Identifier: GPL-2.0+
2+
/*
3+
* Device Tree file for the Kontron SMARC-sAL28 board.
4+
*
5+
* This is for the network variant 3 which has one ethernet ports.
6+
*
7+
* Copyright (C) 2024 Michael Walle <michael@walle.cc>
8+
*
9+
*/
10+
11+
/dts-v1/;
12+
13+
#include "fsl-ls1028a-kontron-sl28.dts"
14+
15+
/ {
16+
model = "Kontron SMARC-sAL28 (Single PHY)";
17+
compatible = "kontron,sl28-var3", "kontron,sl28", "fsl,ls1028a";
18+
};

‎arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi‎

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1099,21 +1099,25 @@
10991099
0xc2000000 0x1 0xf8230000 0x1 0xf8230000 0x0 0x020000
11001100
/* BAR4 (PF5) - non-prefetchable memory */
11011101
0x82000000 0x1 0xfc000000 0x1 0xfc000000 0x0 0x400000>;
1102+
#interrupt-cells = <1>;
1103+
interrupt-map-mask = <0 0 0 7>;
1104+
interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1105+
<0000 0 0 2 &gic 0 0 GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
11021106

11031107
enetc_port0: ethernet@0,0 {
1104-
compatible = "fsl,enetc";
1108+
compatible = "pci1957,e100", "fsl,enetc";
11051109
reg = <0x000000 0 0 0 0>;
11061110
status = "disabled";
11071111
};
11081112

11091113
enetc_port1: ethernet@0,1 {
1110-
compatible = "fsl,enetc";
1114+
compatible = "pci1957,e100", "fsl,enetc";
11111115
reg = <0x000100 0 0 0 0>;
11121116
status = "disabled";
11131117
};
11141118

11151119
enetc_port2: ethernet@0,2 {
1116-
compatible = "fsl,enetc";
1120+
compatible = "pci1957,e100", "fsl,enetc";
11171121
reg = <0x000200 0 0 0 0>;
11181122
phy-mode = "internal";
11191123
status = "disabled";
@@ -1126,14 +1130,14 @@
11261130
};
11271131

11281132
enetc_mdio_pf3: mdio@0,3 {
1129-
compatible = "fsl,enetc-mdio";
1133+
compatible = "pci1957,ee01", "fsl,enetc-mdio";
11301134
reg = <0x000300 0 0 0 0>;
11311135
#address-cells = <1>;
11321136
#size-cells = <0>;
11331137
};
11341138

11351139
ethernet@0,4 {
1136-
compatible = "fsl,enetc-ptp";
1140+
compatible = "pci1957,ee02", "fsl,enetc-ptp";
11371141
reg = <0x000400 0 0 0 0>;
11381142
clocks = <&clockgen QORIQ_CLK_HWACCEL 3>;
11391143
little-endian;
@@ -1143,7 +1147,7 @@
11431147
mscc_felix: ethernet-switch@0,5 {
11441148
reg = <0x000500 0 0 0 0>;
11451149
/* IEP INT_B */
1146-
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1150+
interrupts = <2>;
11471151
status = "disabled";
11481152

11491153
mscc_felix_ports: ports {
@@ -1201,7 +1205,7 @@
12011205
};
12021206

12031207
enetc_port3: ethernet@0,6 {
1204-
compatible = "fsl,enetc";
1208+
compatible = "pci1957,e100", "fsl,enetc";
12051209
reg = <0x000600 0 0 0 0>;
12061210
phy-mode = "internal";
12071211
status = "disabled";
@@ -1216,7 +1220,7 @@
12161220
rcec@1f,0 {
12171221
reg = <0x00f800 0 0 0 0>;
12181222
/* IEP INT_A */
1219-
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1223+
interrupts = <1>;
12201224
};
12211225
};
12221226

‎arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi‎

Lines changed: 106 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -748,7 +748,10 @@
748748
clock-names = "i2c";
749749
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
750750
QORIQ_CLK_PLL_DIV(16)>;
751-
scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
751+
pinctrl-names = "default", "gpio";
752+
pinctrl-0 = <&i2c0_scl>;
753+
pinctrl-1 = <&i2c0_scl_gpio>;
754+
scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
752755
status = "disabled";
753756
};
754757

@@ -761,6 +764,10 @@
761764
clock-names = "i2c";
762765
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
763766
QORIQ_CLK_PLL_DIV(16)>;
767+
pinctrl-names = "default", "gpio";
768+
pinctrl-0 = <&i2c1_scl>;
769+
pinctrl-1 = <&i2c1_scl_gpio>;
770+
scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
764771
status = "disabled";
765772
};
766773

@@ -773,6 +780,10 @@
773780
clock-names = "i2c";
774781
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
775782
QORIQ_CLK_PLL_DIV(16)>;
783+
pinctrl-names = "default", "gpio";
784+
pinctrl-0 = <&i2c2_scl>;
785+
pinctrl-1 = <&i2c2_scl_gpio>;
786+
scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
776787
status = "disabled";
777788
};
778789

@@ -785,6 +796,10 @@
785796
clock-names = "i2c";
786797
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
787798
QORIQ_CLK_PLL_DIV(16)>;
799+
pinctrl-names = "default", "gpio";
800+
pinctrl-0 = <&i2c3_scl>;
801+
pinctrl-1 = <&i2c3_scl_gpio>;
802+
scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
788803
status = "disabled";
789804
};
790805

@@ -797,7 +812,10 @@
797812
clock-names = "i2c";
798813
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
799814
QORIQ_CLK_PLL_DIV(16)>;
800-
scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
815+
pinctrl-names = "default", "gpio";
816+
pinctrl-0 = <&i2c4_scl>;
817+
pinctrl-1 = <&i2c4_scl_gpio>;
818+
scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
801819
status = "disabled";
802820
};
803821

@@ -810,6 +828,10 @@
810828
clock-names = "i2c";
811829
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
812830
QORIQ_CLK_PLL_DIV(16)>;
831+
pinctrl-names = "default", "gpio";
832+
pinctrl-0 = <&i2c5_scl>;
833+
pinctrl-1 = <&i2c5_scl_gpio>;
834+
scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
813835
status = "disabled";
814836
};
815837

@@ -822,6 +844,10 @@
822844
clock-names = "i2c";
823845
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
824846
QORIQ_CLK_PLL_DIV(16)>;
847+
pinctrl-names = "default", "gpio";
848+
pinctrl-0 = <&i2c6_scl>;
849+
pinctrl-1 = <&i2c6_scl_gpio>;
850+
scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
825851
status = "disabled";
826852
};
827853

@@ -834,6 +860,10 @@
834860
clock-names = "i2c";
835861
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
836862
QORIQ_CLK_PLL_DIV(16)>;
863+
pinctrl-names = "default", "gpio";
864+
pinctrl-0 = <&i2c7_scl>;
865+
pinctrl-1 = <&i2c7_scl_gpio>;
866+
scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
837867
status = "disabled";
838868
};
839869

@@ -1669,6 +1699,80 @@
16691699
};
16701700
};
16711701

1702+
pinmux_i2crv: pinmux@70010012c {
1703+
compatible = "pinctrl-single";
1704+
reg = <0x00000007 0x0010012c 0x0 0xc>;
1705+
#address-cells = <2>;
1706+
#size-cells = <2>;
1707+
pinctrl-single,bit-per-mux;
1708+
pinctrl-single,register-width = <32>;
1709+
pinctrl-single,function-mask = <0x7>;
1710+
1711+
i2c1_scl: i2c1-scl-pins {
1712+
pinctrl-single,bits = <0x0 0 0x7>;
1713+
};
1714+
1715+
i2c1_scl_gpio: i2c1-scl-gpio-pins {
1716+
pinctrl-single,bits = <0x0 0x1 0x7>;
1717+
};
1718+
1719+
i2c2_scl: i2c2-scl-pins {
1720+
pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
1721+
};
1722+
1723+
i2c2_scl_gpio: i2c2-scl-gpio-pins {
1724+
pinctrl-single,bits = <0x0 (0x1 << 3) (0x7 << 3)>;
1725+
};
1726+
1727+
i2c3_scl: i2c3-scl-pins {
1728+
pinctrl-single,bits = <0x0 0 (0x7 << 6)>;
1729+
};
1730+
1731+
i2c3_scl_gpio: i2c3-scl-gpio-pins {
1732+
pinctrl-single,bits = <0x0 (0x1 << 6) (0x7 << 6)>;
1733+
};
1734+
1735+
i2c4_scl: i2c4-scl-pins {
1736+
pinctrl-single,bits = <0x0 0 (0x7 << 9)>;
1737+
};
1738+
1739+
i2c4_scl_gpio: i2c4-scl-gpio-pins {
1740+
pinctrl-single,bits = <0x0 (0x1 << 9) (0x7 << 9)>;
1741+
};
1742+
1743+
i2c5_scl: i2c5-scl-pins {
1744+
pinctrl-single,bits = <0x0 0 (0x7 << 12)>;
1745+
};
1746+
1747+
i2c5_scl_gpio: i2c5-scl-gpio-pins {
1748+
pinctrl-single,bits = <0x0 (0x1 << 12) (0x7 << 12)>;
1749+
};
1750+
1751+
i2c6_scl: i2c6-scl-pins {
1752+
pinctrl-single,bits = <0x4 0x2 0x7>;
1753+
};
1754+
1755+
i2c6_scl_gpio: i2c6-scl-gpio-pins {
1756+
pinctrl-single,bits = <0x4 0x1 0x7>;
1757+
};
1758+
1759+
i2c7_scl: i2c7-scl-pins {
1760+
pinctrl-single,bits = <0x4 0x2 0x7>;
1761+
};
1762+
1763+
i2c7_scl_gpio: i2c7-scl-gpio-pins {
1764+
pinctrl-single,bits = <0x4 0x1 0x7>;
1765+
};
1766+
1767+
i2c0_scl: i2c0-scl-pins {
1768+
pinctrl-single,bits = <0x8 0 (0x7 << 10)>;
1769+
};
1770+
1771+
i2c0_scl_gpio: i2c0-scl-gpio-pins {
1772+
pinctrl-single,bits = <0x8 (0x1 << 10) (0x7 << 10)>;
1773+
};
1774+
};
1775+
16721776
fsl_mc: fsl-mc@80c000000 {
16731777
compatible = "fsl,qoriq-mc";
16741778
reg = <0x00000008 0x0c000000 0 0x40>,

‎arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
i2c7 = &mpcie1_i2c;
2626
i2c8 = &mpcie0_i2c;
2727
i2c9 = &pcieclk_i2c;
28+
i2c10 = &i2c5;
2829
mmc0 = &esdhc0;
2930
mmc1 = &esdhc1;
3031
serial0 = &uart0;

‎arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,3 +71,12 @@
7171
reg = <0x54>;
7272
};
7373
};
74+
75+
&i2c5 {
76+
status = "okay";
77+
78+
rtc@6f {
79+
compatible = "microchip,mcp7940x";
80+
reg = <0x6f>;
81+
};
82+
};

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