Skip to content

Commit f78dc1d

Browse files
jgunthorpejoergroedel
authored andcommitted
iommu: Redefine IOMMU_CAP_CACHE_COHERENCY as the cap flag for IOMMU_CACHE
While the comment was correct that this flag was intended to convey the block no-snoop support in the IOMMU, it has become widely implemented and used to mean the IOMMU supports IOMMU_CACHE as a map flag. Only the Intel driver was different. Now that the Intel driver is using enforce_cache_coherency() update the comment to make it clear that IOMMU_CAP_CACHE_COHERENCY is only about IOMMU_CACHE. Fix the Intel driver to return true since IOMMU_CACHE always works. The two places that test this flag, usnic and vdpa, are both assigning userspace pages to a driver controlled iommu_domain and require IOMMU_CACHE behavior as they offer no way for userspace to synchronize caches. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/3-v3-2cf356649677+a32-intel_no_snoop_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
1 parent 71cfafd commit f78dc1d

2 files changed

Lines changed: 2 additions & 3 deletions

File tree

drivers/iommu/intel/iommu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4556,7 +4556,7 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain)
45564556
static bool intel_iommu_capable(enum iommu_cap cap)
45574557
{
45584558
if (cap == IOMMU_CAP_CACHE_COHERENCY)
4559-
return domain_update_iommu_snooping(NULL);
4559+
return true;
45604560
if (cap == IOMMU_CAP_INTR_REMAP)
45614561
return irq_remapping_enabled == 1;
45624562
if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION)

include/linux/iommu.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -103,8 +103,7 @@ static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
103103
}
104104

105105
enum iommu_cap {
106-
IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
107-
transactions */
106+
IOMMU_CAP_CACHE_COHERENCY, /* IOMMU_CACHE is supported */
108107
IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
109108
IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
110109
IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for

0 commit comments

Comments
 (0)