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1 change: 1 addition & 0 deletions Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

Original file line number Diff line number Diff line change
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---
status: open
kind: defect
opened: 2026-10-04
---

# toyos-cpuvuln has one consumer and lives outside it

Since pull request #705 the kernel depends on `toyos-cpuvuln` for which
counters a CPU has (`toyos_cpuvuln::counters`), and nothing else depends on
it: a crate with one consumer, which `.claude/agents/reviewer.md`'s Fit puts
under that consumer as #703 put every other, still at the repository root as
a host workspace member. #705 left it
there because the move was outside its brief.

Owner: the orchestrator, who briefs the move. **Exit**: the crate lives under
`kernel/`, every path naming `toyos-cpuvuln/` moved with it (the root
`Cargo.toml`'s members, `kernel/Cargo.toml`, and the issues citing its
fixtures), and `src/hostws.rs` green; or a second consumer depends on it.
4 changes: 2 additions & 2 deletions issues/diagnostics/toyos-explains-itself.md
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@ opened: 2026-10-04
ToyOS answers what it is doing, what it did and what it is made of from
inside itself, with programs it ships. Today the answers are scattered: the
log carries numbers in prose (`irq:`, `tlb:`, `PMM:`, `sched:`, `syscalls:`),
the trace ring has LLDB as its only reader, nothing reads APERF, MPERF,
`MSR_SMI_COUNT`, RAPL or C-state residency, a process's memory is a byte sum
the trace ring has LLDB as its only reader, nothing reads RAPL or C-state
residency, a process's memory is a byte sum
that reads 0 under contention, and a user symbol is resolved by the kernel.
Each pillar's own track carries its steps and its exits; this track holds the
counters and sizes pillars, which no other track does.
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
---
status: open
kind: tooling
opened: 2026-10-04
---

# A boot's readback is lost to one ssh that times out

`src/metal.rs`'s `read_mounted` reads each log file off the T14's stick by
one `ssh … cat` (`Driver::cat`), and `Driver::ssh` runs it once: a dial that
times out after the boot came back fails the boot's readback whole. Nothing
retries it, and nothing keeps the stick's copy anywhere else, so the next
boot's flash (`wipefs --all`, then `dd`) destroys the only record of the boot
that ran. Every row judged on that boot then fails on the harness's word, not
the boot's.

Evidence: the full metal profile at `ce1786ff0` (pull request #705, the
orchestrator's Drive log). The `jobcase` boot's machine answered ssh again
48 s after its reboot, the boot stick enumerated, the log partition mounted
and unmounted, and between the two the read failed with `reading a log file
on the machine exited exit status: 255: Connection timed out during banner
exchange`; the next boot's flash followed. Its four rows
(`usb_reset_hands_devices_back`, `blackbox_done_chain`, `machine_reboot`,
`machine_soft_off_decoded`) failed on that line, 275 of 279 green; the same
image (sha256 checked), booted again, was judged green on all four. The development
machine's network dropped in the same minutes.

Owner: the orchestrator, which holds the T14. **Exit**: a dial lost while
the stick is being read costs a retry bounded by a timeout that fails loudly,
not the boot, or the stick's log partition is copied off whole before anything
else can flash it; and a mutation that makes the first `cat` of a run's first
boot fail once is read back green.
Original file line number Diff line number Diff line change
Expand Up @@ -31,193 +31,15 @@ reads it. **Oracle**: that Linux.
## Linux's counter readings, read 2026-10-03

The orchestrator takes this Linux as the one independent oracle for the T14's
hardware counters (`issues/diagnostics/toyos-explains-itself.md`). Run as root
under Ubuntu's `6.8.0-142-generic` from 16:22:37 UTC, one after the other;
each output below is whole but for trailing blanks. No test reads them yet:
the T14 row the umbrella track's exit names does.

Idle, 60 s: `turbostat --quiet --interval 10 --num_iterations 6 --show
Core,CPU,Avg_MHz,Busy%,Bzy_MHz,TSC_MHz,IRQ,SMI,CPU%c1,CPU%c6,CPU%c7,CoreTmp,PkgTmp,Pkg%pc2,Pkg%pc3,Pkg%pc6,Pkg%pc7,Pkg%pc8,Pkg%pc9,Pk%pc10,PkgWatt,CorWatt`.
Machine-wide per 10 s: busy 0.11 to 0.36%, busy clock 980 to 1668 MHz, TSC
2419 MHz, SMI 0, core C7 98.78 to 100.08%, package PC8 75.47 to 82.10%,
package 1.14 to 1.88 W, cores 0.07 to 0.13 W.

```
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 1 0.11 994 2419 1160 0 0.47 0.00 99.98 29 31 17.46 2.01 0.03 0.29 77.22 0.00 0.00 1.30 0.07
0 0 1 0.11 1012 2419 131 0 0.12 0.00 100.42 26 31 17.46 2.01 0.03 0.29 77.22 0.00 0.00 1.30 0.07
0 4 0 0.05 910 2419 53 0 0.12
1 1 1 0.08 986 2419 57 0 0.30 0.00 100.18 27
1 5 1 0.12 999 2419 119 0 0.30
2 2 1 0.13 933 2419 423 0 1.29 0.00 99.04 29
2 6 2 0.19 1002 2419 157 0 1.29
3 3 1 0.14 978 2419 148 0 0.16 0.00 100.27 28
3 7 1 0.09 1115 2419 72 0 0.16
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 1 0.11 980 2419 1009 0 0.38 0.00 100.08 29 30 19.01 1.80 0.05 0.22 76.10 0.00 0.00 1.81 0.07
0 0 1 0.07 975 2419 46 0 0.14 0.00 100.37 26 30 19.01 1.80 0.05 0.22 76.10 0.00 0.00 1.81 0.07
0 4 1 0.11 913 2419 72 0 0.14
1 1 0 0.03 997 2419 23 0 0.19 0.00 100.34 25
1 5 1 0.13 993 2419 130 0 0.19
2 2 1 0.11 943 2419 386 0 1.14 0.00 99.27 29
2 6 2 0.18 1035 2419 155 0 1.14
3 3 1 0.14 967 2419 141 0 0.06 0.00 100.36 27
3 7 1 0.09 997 2419 56 0 0.06
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 1 0.11 1005 2419 1125 0 0.42 0.00 100.03 29 31 19.47 1.35 0.06 0.23 75.87 0.00 0.00 1.43 0.07
0 0 1 0.12 1081 2419 42 0 0.08 0.00 100.39 26 31 19.47 1.35 0.06 0.23 75.87 0.00 0.00 1.43 0.07
0 4 1 0.13 998 2419 56 0 0.08
1 1 1 0.10 1006 2419 127 0 0.22 0.00 100.21 25
1 5 1 0.14 1004 2419 132 0 0.22
2 2 2 0.16 981 2419 513 0 1.33 0.00 99.12 29
2 6 1 0.08 1028 2419 75 0 1.33
3 3 1 0.13 953 2419 137 0 0.05 0.00 100.42 28
3 7 1 0.06 1019 2419 43 0 0.05
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 6 0.36 1668 2419 1966 0 1.14 0.00 98.78 29 32 18.49 1.12 0.04 0.33 75.47 0.00 0.00 1.14 0.13
0 0 7 0.43 1587 2419 231 0 0.90 0.00 99.10 26 32 18.49 1.12 0.04 0.33 75.47 0.00 0.00 1.14 0.13
0 4 2 0.15 994 2419 96 0 0.90
1 1 11 0.48 2410 2419 185 0 1.08 0.00 98.67 27
1 5 7 0.46 1450 2419 348 0 1.08
2 2 8 0.48 1564 2419 635 0 1.97 0.00 98.11 29
2 6 1 0.08 1040 2419 72 0 1.97
3 3 12 0.69 1725 2419 326 0 0.60 0.00 99.24 28
3 7 1 0.08 1053 2419 73 0 0.60
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 1 0.12 984 2419 1166 0 0.39 0.00 100.01 29 31 13.62 2.79 0.04 0.39 80.55 0.00 0.00 1.30 0.07
0 0 0 0.05 957 2419 34 0 0.09 0.00 100.41 26 31 13.62 2.79 0.04 0.39 80.55 0.00 0.00 1.30 0.07
0 4 1 0.13 943 2419 78 0 0.09
1 1 1 0.05 982 2419 47 0 0.36 0.00 100.00 27
1 5 2 0.23 1023 2419 186 0 0.36
2 2 1 0.05 1001 2419 45 0 0.09 0.00 100.38 29
2 6 2 0.15 989 2419 135 0 0.09
3 3 2 0.22 959 2419 535 0 1.04 0.00 99.26 28
3 7 1 0.10 994 2419 106 0 1.04
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 PkgWatt CorWatt
- - 1 0.12 980 2419 1156 0 0.39 0.00 100.03 28 31 13.35 1.53 0.07 0.41 82.10 0.00 0.00 1.88 0.07
0 0 1 0.05 958 2419 40 0 0.16 0.00 100.38 26 31 13.35 1.53 0.07 0.41 82.10 0.00 0.00 1.88 0.07
0 4 1 0.11 947 2419 82 0 0.16
1 1 1 0.09 989 2419 76 0 0.26 0.00 100.09 26
1 5 2 0.19 990 2419 174 0 0.26
2 2 1 0.09 965 2419 335 0 0.96 0.00 99.42 28
2 6 2 0.19 995 2419 178 0 0.96
3 3 2 0.19 976 2419 242 0 0.18 0.00 100.24 28
3 7 0 0.04 1021 2419 29 0 0.18
```

Loaded, 60 s, eight `yes > /dev/null` started 2 s before: `for i in 1 2 3 4 5
6 7 8; do timeout 65 sh -c "yes > /dev/null" & done; sleep 2; turbostat
--quiet --interval 10 --num_iterations 6 --show
Core,CPU,Avg_MHz,Busy%,Bzy_MHz,TSC_MHz,IRQ,SMI,CPU%c1,CPU%c6,CPU%c7,CoreTmp,PkgTmp,Pkg%pc2,Pkg%pc6,Pk%pc10,PkgWatt,CorWatt;
wait`. Busy 99.77%; busy clock 3800 MHz at 30.24 and 30.73 W package for the
first two intervals, 3555 MHz at 27.20 W in the third, then 3075 to 3094 MHz
at 19.62 to 19.92 W; about 10,000
interrupts per CPU per 10 s; SMI 0.

```
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3791 99.77 3800 2419 80691 0 0.00 0.00 0.00 71 71 0.00 0.00 0.00 30.24 27.88
0 0 3791 99.77 3800 2419 10023 0 0.00 0.00 0.00 61 71 0.00 0.00 0.00 30.24 27.88
0 4 3791 99.77 3800 2419 10021 0 0.00
1 1 3791 99.77 3800 2419 10066 0 0.00 0.00 0.00 71
1 5 3791 99.77 3800 2419 10102 0 0.00
2 2 3791 99.77 3800 2419 10031 0 0.00 0.00 0.00 62
2 6 3791 99.77 3800 2419 10274 0 0.00
3 3 3791 99.77 3800 2419 10125 0 0.00 0.00 0.00 71
3 7 3791 99.77 3800 2419 10049 0 0.00
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3791 99.77 3800 2419 80659 0 0.00 0.00 0.00 79 79 0.00 0.00 0.00 30.73 28.29
0 0 3791 99.77 3800 2419 10012 0 0.00 0.00 0.00 68 79 0.00 0.00 0.00 30.73 28.29
0 4 3791 99.77 3800 2419 10014 0 0.00
1 1 3791 99.77 3800 2419 10026 0 0.00 0.00 0.00 79
1 5 3791 99.77 3800 2419 10095 0 0.00
2 2 3791 99.77 3800 2419 10017 0 0.00 0.00 0.00 69
2 6 3791 99.77 3800 2419 10364 0 0.00
3 3 3791 99.77 3800 2419 10122 0 0.00 0.00 0.00 78
3 7 3791 99.77 3800 2419 10009 0 0.00
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3547 99.77 3555 2419 80555 0 0.00 0.00 0.00 66 66 0.00 0.00 0.00 27.20 24.72
0 0 3547 99.77 3555 2419 10021 0 0.00 0.00 0.00 58 66 0.00 0.00 0.00 27.20 24.72
0 4 3547 99.77 3555 2419 10010 0 0.00
1 1 3547 99.77 3555 2419 10028 0 0.00 0.00 0.00 65
1 5 3547 99.77 3555 2419 10037 0 0.00
2 2 3547 99.77 3555 2419 10028 0 0.00 0.00 0.00 60
2 6 3547 99.77 3555 2419 10246 0 0.00
3 3 3547 99.77 3555 2419 10173 0 0.00 0.00 0.00 66
3 7 3547 99.77 3555 2419 10012 0 0.00
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3068 99.77 3075 2419 80909 0 0.00 0.00 0.00 65 65 0.00 0.00 0.00 19.62 17.18
0 0 3068 99.77 3075 2419 10054 0 0.00 0.00 0.00 59 65 0.00 0.00 0.00 19.62 17.18
0 4 3068 99.77 3075 2419 10029 0 0.00
1 1 3068 99.77 3075 2419 10121 0 0.00 0.00 0.00 65
1 5 3068 99.77 3075 2419 10039 0 0.00
2 2 3068 99.77 3075 2419 10069 0 0.00 0.00 0.00 59
2 6 3068 99.77 3075 2419 10276 0 0.00
3 3 3068 99.77 3075 2419 10229 0 0.00 0.00 0.00 64
3 7 3068 99.76 3075 2419 10092 0 0.00
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3083 99.77 3090 2419 80593 0 0.00 0.00 0.00 65 65 0.00 0.00 0.00 19.85 17.43
0 0 3083 99.77 3090 2419 10008 0 0.00 0.00 0.00 58 65 0.00 0.00 0.00 19.85 17.43
0 4 3083 99.77 3090 2419 10020 0 0.00
1 1 3083 99.77 3090 2419 10006 0 0.00 0.00 0.00 64
1 5 3083 99.77 3090 2419 10019 0 0.00
2 2 3083 99.77 3090 2419 10028 0 0.00 0.00 0.00 60
2 6 3083 99.77 3090 2419 10282 0 0.00
3 3 3083 99.77 3090 2419 10221 0 0.00 0.00 0.00 65
3 7 3083 99.77 3090 2419 10009 0 0.00
Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IRQ SMI CPU%c1 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc6 Pk%pc10 PkgWatt CorWatt
- - 3087 99.77 3094 2419 80544 0 0.00 0.00 0.00 65 65 0.00 0.00 0.00 19.92 17.49
0 0 3087 99.77 3094 2419 10009 0 0.00 0.00 0.00 58 65 0.00 0.00 0.00 19.92 17.49
0 4 3087 99.77 3094 2419 10011 0 0.00
1 1 3087 99.77 3094 2419 10012 0 0.00 0.00 0.00 65
1 5 3087 99.77 3094 2419 10009 0 0.00
2 2 3087 99.77 3094 2419 10017 0 0.00 0.00 0.00 59
2 6 3087 99.77 3094 2419 10273 0 0.00
3 3 3087 99.77 3094 2419 10205 0 0.00 0.00 0.00 65
3 7 3087 99.77 3094 2419 10008 0 0.00
```

Idle, 60 s: `perf stat -a -A -e msr/aperf/,msr/mperf/,msr/smi/,msr/tsc/ sleep
60`. `msr/smi/` 0 on all eight CPUs; `msr/tsc/` 145,157,230,321 to
145,157,642,420 per CPU over 60.002902881 s, 2419.2 MHz.

```
Performance counter stats for 'system wide':

CPU0 98,079,648 msr/aperf/
CPU1 181,130,722 msr/aperf/
CPU2 121,578,728 msr/aperf/
CPU3 140,715,079 msr/aperf/
CPU4 61,297,064 msr/aperf/
CPU5 191,874,303 msr/aperf/
CPU6 96,508,493 msr/aperf/
CPU7 74,201,638 msr/aperf/
CPU0 150,186,840 msr/mperf/
CPU1 192,582,720 msr/mperf/
CPU2 234,799,920 msr/mperf/
CPU3 313,507,656 msr/mperf/
CPU4 156,309,048 msr/mperf/
CPU5 326,606,712 msr/mperf/
CPU6 227,450,760 msr/mperf/
CPU7 156,326,856 msr/mperf/
CPU0 0 msr/smi/
CPU1 0 msr/smi/
CPU2 0 msr/smi/
CPU3 0 msr/smi/
CPU4 0 msr/smi/
CPU5 0 msr/smi/
CPU6 0 msr/smi/
CPU7 0 msr/smi/
CPU0 145,157,386,466 msr/tsc/
CPU1 145,157,434,015 msr/tsc/
CPU2 145,157,376,550 msr/tsc/
CPU3 145,157,230,321 msr/tsc/
CPU4 145,157,567,260 msr/tsc/
CPU5 145,157,642,420 msr/tsc/
CPU6 145,157,528,396 msr/tsc/
CPU7 145,157,356,567 msr/tsc/

60.002902881 seconds time elapsed
```
hardware counters (`issues/diagnostics/toyos-explains-itself.md`). Read as
root under Ubuntu's `6.8.0-142-generic` from 16:22:37 UTC, one after the
other, and committed whole with their commands in the `SOURCE` beside them:
turbostat idle and under one `yes` per CPU in `tests/t14-linux/`, which
`counters_on_metal` prints ToyOS's reading beside, and `perf stat` over the
msr PMU in `toyos-cpuvuln/fixtures/t14/perf-msr.txt`, which
`the_t14_has_what_linux_counted_on_it` holds the T14's counter verdict to.
Idle, per 10 s: busy 0.11 to 0.36%, busy clock 980 to 1668 MHz, TSC 2419
MHz, SMI 0. Loaded: busy 99.77%, busy clock 3800 MHz for the first two
intervals, 3555 MHz in the third, then 3075 to 3094 MHz; SMI 0.

Owner: the orchestrator, which holds the T14 the exit runs on.
31 changes: 0 additions & 31 deletions issues/kernel/an-ipi-can-overtake-the-stores-it-announces.md

This file was deleted.

Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
---
status: open
kind: defect
opened: 2026-10-04
---

# ToyOS runs the T14 under load below the clock Linux reaches

The `counters` metal row, at `ce1786ff0` (pull request #705), spun one thread
per CPU for its `spin` phase and read every CPU's busy clock as 2318 MHz
(TSC 2419 MHz times APERF over MPERF, MPERF at 0.986 to 0.990 of the stamp,
so every CPU was in C0 the whole span). Linux's turbostat on the same machine
under one `yes` per CPU (`tests/t14-linux/turbostat-loaded.txt`) reads
3800 MHz for its first 20 s and 3075 to 3094 MHz once the package settles near
20 W. ToyOS runs a loaded T14 at 61 to 75% of Linux's busy clock, below the
TSC's own rate.

The CPU enumerates HWP (`hwp`, `hwp_epp` in
`toyos-cpuvuln/fixtures/t14/cpuinfo.txt`), and the kernel writes neither
`IA32_PM_ENABLE` nor `IA32_PERF_CTL`: the clock is whatever the firmware left.
`issues/kernel/the-scheduler-and-the-clocks-never-talk.md` is the track that
would couple the scheduler to frequency; this is the floor beneath it, a
machine that never leaves the firmware's operating point.

Owner: the orchestrator, which holds the T14. **Exit**: the `counters` row
holds every CPU's busy clock across its spin to
Linux's loaded range in `tests/t14-linux/`, and the reading that held it is in
the closing pull request.
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
---
status: open
kind: defect
opened: 2026-10-04
---

# Two T14 CPUs idle busier under ToyOS than any under Linux

The `counters` metal row, at `ce1786ff0` (pull request #705), read each CPU's
MPERF over its stamp across the idle second between its `idle0` and `idle1`
reads: cpu0 1.37% and cpu7 1.45% busy, cpu3 0.11%, the other five 0.00 or
0.01%. Linux's turbostat on the same machine, idle
(`tests/t14-linux/turbostat-idle.txt`), reads 0.11 to 0.36% machine-wide per
10 s and no CPU above 0.69%. So six CPUs idle deeper than Linux's and two
about four times busier than Linux's machine-wide busiest interval.

A second boot, at `a059144e2`, read the same two CPUs again: cpu0 1.35% and
cpu7 1.42%, cpu4 0.37%, cpu3 0.11%, the other four 0.00 to 0.03%. The two
busy CPUs reproduce across boots.

Not yet attributed: the row's own reader runs between the two reads, prints
its `idle0` lines and parks, and which CPUs it and the log's path ran on that
second is not recorded. Owner: the orchestrator, which holds the T14.
**Exit**: a reading that names what ran on cpu0 and
cpu7 across that second; then the cause is fixed, or, if it is the row's own
work, folded to the row's doc.
5 changes: 5 additions & 0 deletions kernel/Cargo.lock

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