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Z80
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Machine cycles
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Manuel Sainz de Baranda y Goñi edited this page
Dec 30, 2025
·
3 revisions
Opcode fetch
Memory read
Memory write
I/O read
I/O write
Internal operation
Maskable interrupt acknowledge (INTA)
Non-maskable interrupt acknowledge (NMIA)
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CPD Test
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CPU models
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Diagnostics I
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Diagnostics II
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ED777F
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EI48K
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EIHALT
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FDDD
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FDDD2
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Glossary
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HALT Contention Test
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HALT state
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HALT2INT
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IFF2 Bug
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IFF2 Bug 128K
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IN MEMPTR
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INI H and C Flags Clearing Test
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Installation
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Instruction set
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Interrupts
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Machine cycles
Opcode fetch
Memory read
Memory write
I/O read
I/O write
Internal operation
Maskable interrupt acknowledge (INTA)
Non-maskable interrupt acknowledge (NMIA)
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MEMPTR
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Notation and nomenclature
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Q
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RESET
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SCF
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SCF Tests
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Simulators
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Special reset
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Super HALT Invaders Test
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Technical literature
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Test CCF
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Test SCF
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Test SCF 9
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Tests
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TSTR
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Z80 Block Flags Test
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Z80 CCF SCF Outcome Stability
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Z80 CPU Bug
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Z80 DDFD3
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Z80 Illegal Instruction Test
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Z80 IM1 vs JR
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Z80 Initial Condition Retriever
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Z80 Instruction Set Exerciser
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Z80 Instruction Set Exerciser for Spectrum 2
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Z80 INT Skip
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Z80 Special Reset
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Z80 Speed Test
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Z80 Test Suite
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Z80 XCF Flavor
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Zilog Z80 CPU Test Suite
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Testing the INT acceptance during RETN on real hardware
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