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zeroall/zeroupper *are* supported by Miri #2116

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Merged
adamgemmell merged 3 commits into from
May 12, 2026
+16 −13
Merged

zeroall/zeroupper *are* supported by Miri #2116

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524cbfa
zeroall/zeroupper *are* supported by Miri
RalfJung May 12, 2026
55fd410
Update/add comments for miri-ignored tests
RalfJung May 12, 2026
00f4315
explain ignore aarch64 tests
RalfJung May 12, 2026
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4 changes: 2 additions & 2 deletions crates/core_arch/src/aarch64/neon/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -789,7 +789,7 @@ mod tests {
macro_rules! wide_store_load_roundtrip_fp16 {
($( $name:ident $args:tt);* $(;)?) => {
$(
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // uses unsupported vendor intrinsics
#[simd_test(enable = "neon,fp16")]
#[cfg(not(target_arch = "arm64ec"))]
unsafe fn $name() {
Expand Down Expand Up @@ -1060,7 +1060,7 @@ mod tests {
macro_rules! lane_wide_store_load_roundtrip_neon {
($( $name:ident $args:tt);* $(;)?) => {
$(
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // uses unsupported vendor intrinsics
#[simd_test(enable = "neon")]
unsafe fn $name() {
lane_wide_store_load_roundtrip! $args;
Expand Down
5 changes: 2 additions & 3 deletions crates/core_arch/src/arm_shared/neon/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -5248,11 +5248,10 @@ mod tests {
};
}

// Most of these are implemented with builtins, which miri can't handle
macro_rules! lane_wide_store_load_roundtrip_neon {
($( $name:ident $args:tt);* $(;)?) => {
$(
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // uses unsupported vendor intrinsics
#[simd_test(enable = "neon")]
unsafe fn $name() {
lane_wide_store_load_roundtrip! $args;
Expand All @@ -5264,7 +5263,7 @@ mod tests {
macro_rules! lane_wide_store_load_roundtrip_fp16 {
($( $name:ident $args:tt);* $(;)?) => {
$(
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // uses unsupported vendor intrinsics
#[simd_test(enable = "neon,fp16")]
#[cfg(not(target_arch = "arm64ec"))]
unsafe fn $name() {
Expand Down
14 changes: 9 additions & 5 deletions crates/core_arch/src/x86/avx.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1097,6 +1097,9 @@ pub const fn _mm256_cvtsi256_si32(a: __m256i) -> i32 {

/// Zeroes the contents of all XMM or YMM registers.
///
/// This operation is purely a performance hint for the CPU and has no effect on the Abstract
/// Machine state.
///
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_zeroall)
#[inline]
#[target_feature(enable = "avx")]
Expand All @@ -1109,6 +1112,9 @@ pub fn _mm256_zeroall() {
/// Zeroes the upper 128 bits of all YMM registers;
/// the lower 128-bits of the registers are unmodified.
///
/// This operation is purely a performance hint for the CPU and has no effect on the Abstract
/// Machine state.
///
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_zeroupper)
#[inline]
#[target_feature(enable = "avx")]
Expand Down Expand Up @@ -4007,13 +4013,11 @@ mod tests {
}

#[simd_test(enable = "avx")]
#[cfg_attr(miri, ignore)] // Register-level operation not supported by Miri
fn test_mm256_zeroall() {
_mm256_zeroall();
}

#[simd_test(enable = "avx")]
#[cfg_attr(miri, ignore)] // Register-level operation not supported by Miri
fn test_mm256_zeroupper() {
_mm256_zeroupper();
}
Expand Down Expand Up @@ -4484,7 +4488,7 @@ mod tests {
}

#[simd_test(enable = "avx")]
#[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm256_stream_si256() {
let a = _mm256_setr_epi64x(1, 2, 3, 4);
let mut r = _mm256_undefined_si256();
Expand All @@ -4496,7 +4500,7 @@ mod tests {
}

#[simd_test(enable = "avx")]
#[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm256_stream_pd() {
#[repr(align(32))]
struct Memory {
Expand All @@ -4515,7 +4519,7 @@ mod tests {
}

#[simd_test(enable = "avx")]
#[cfg_attr(miri, ignore)] // Non-temporal store, which is not supported by Miri
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm256_stream_ps() {
#[repr(align(32))]
struct Memory {
Expand Down
6 changes: 3 additions & 3 deletions crates/core_arch/src/x86/avx512f.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -58246,7 +58246,7 @@ mod tests {
}

#[simd_test(enable = "avx512f")]
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm512_stream_ps() {
#[repr(align(64))]
struct Memory {
Expand All @@ -58265,7 +58265,7 @@ mod tests {
}

#[simd_test(enable = "avx512f")]
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm512_stream_pd() {
#[repr(align(64))]
struct Memory {
Expand All @@ -58284,7 +58284,7 @@ mod tests {
}

#[simd_test(enable = "avx512f")]
#[cfg_attr(miri, ignore)]
#[cfg_attr(miri, ignore)] // Inline asm (for non-temporal store), which is not supported by Miri
fn test_mm512_stream_si512() {
#[repr(align(64))]
struct Memory {
Expand Down
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