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vregion: Cross core user-space DP fix #11071

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vregion: Cross core user-space DP fix #11071

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c7f8084
vregion: allocate metadata with coherent memory for cross-core access
Aug 6, 2026
8e90e0e
vregion: flush interim heap buffer after init for cross-core access
Aug 6, 2026
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12 changes: 10 additions & 2 deletions zephyr/lib/vregion.c
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Original file line number Diff line number Diff line change
Expand Up @@ -127,8 +127,11 @@ struct vregion *vregion_create(size_t memsize)
*/
total_size = ALIGN_UP(memsize, CONFIG_MM_DRV_PAGE_SIZE);

/* allocate vregion metadata separately to keep it inaccessible to the user */
vr = rmalloc(0, sizeof(*vr));
/* allocate vregion metadata separately to keep it inaccessible to the user.
* Use coherent memory so interim heap state written on one core is
* visible to other cores during cross-core buffer allocation.
*/
vr = rmalloc(SOF_MEM_FLAG_COHERENT, sizeof(*vr));
if (!vr)
return NULL;

Expand Down Expand Up @@ -254,6 +257,11 @@ static void interim_heap_init(struct vregion *vr)
k_heap_init(&vr->interim.heap, interim_base, interim_size);
vr->type = VREGION_MEM_TYPE_INTERIM;

/* Flush the heap metadata written by k_heap_init to main memory
* so other cores can access the interim heap without stale cache.

@kv2019i kv2019i Aug 10, 2026

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Hmm, but should heap be initialited with coherent address and cached addresses given out when/if needed? It seems all heap actions are now unsafe with multicore unless you have explicit cache flushes whenever the heap is used via k_heap. Am I missing something?

*/
sys_cache_data_flush_range(interim_base, interim_size);
Comment on lines +260 to +263

@kv2019i kv2019i Aug 10, 2026

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Please address this


/* Update lifetime heap with the interim heap usage. */
vr->lifetime.ptr = (void *)(interim_base + interim_size);
vr->lifetime.used = (uint8_t *)vr->lifetime.ptr - (uint8_t *)vr->lifetime.base;
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