cksum: only report x86 hardware features on x86 targets by ChihweiLHBird · Pull Request #14805 · uutils/coreutils

ChihweiLHBird · 2026-09-22T02:53:55Z

Summary

cksum --debug printed the avx512, avx2 and pclmul detection lines on every target, so a build for a non-x86 architecture reported instruction sets its CPU cannot have. GNU compiles each of those lines in only where the matching implementation exists, so it prints none of them on non-x86.

This PR gates the three x86 lines on x86/x86_64, the same way the vmull line is already gated on aarch64, and splits the tests so the x86 assertions run only on x86 and a new test covers the other targets.

Example (assuming non-x86 arch)

$ cksum --debug /dev/null   # riscv64gc-unknown-linux-musl build, run under qemu-riscv64-static

Before:

avx512 support not detected
avx2 support not detected
pclmul support not detected

After, same as GNU: nothing on stderr. Output on x86-64 is unchanged.

xtqqczze · 2026-09-22T13:34:16Z

The fix should be made also be made in src/uucore/src/lib/features/hardware.rs.

This then becomes dead code:

#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
fn detect_avx512() -> bool {
    false
}

xtqqczze · 2026-09-22T13:45:46Z

GNU compiles each of those lines in only where the matching implementation exists, so it prints none of them on non-x86

GNU does not implement --debug; this claim is incorrect.

oech3 · 2026-09-22T14:39:32Z

What? GNU supports --debug. If not, you are using outdated version.

xtqqczze · 2026-09-22T15:00:35Z

$ gcksum --version
cksum (GNU coreutils) 9.12
...
$ gcksum --debug /dev/null
4294967295 0 /dev/null

My mistake, --debug is supported, it just doesn't do anything.

ChihweiLHBird · 2026-09-22T17:04:15Z

The fix should be made also be made in src/uucore/src/lib/features/hardware.rs.

This then becomes dead code:
#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
fn detect_avx512() -> bool {
    false
}

It's not strictly a deadcode because detect_impl still invokes it. In order to clean them up, I had to refactor how detect_impl and the DETECTORS were defined.
See c3afbfd for detailed change. But I am not confident that this is the best design because it makes detect_avx512 only available for compiler on x86... Let me know what's the team's decision and I will follow.

codspeed · 2026-09-22T17:06:12Z

Merging this PR will not alter performance

✅ 40 untouched benchmarks
⏩ 404 skipped benchmarks¹

_{Comparing ChihweiLHBird:zhiwei/fix-cksum-debug-arch-gating (9d0fbc5) with main (b54bd05)}

404 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

xtqqczze · 2026-09-22T20:26:00Z

+    (HardwareFeature::Sse2, detect_sse2),
+];
+
+// The NEON implementations these features select (for example bytecount's


ARM Neon is fully supported in big-endian mode, would it make sense not to exclude it here?

Thank you! Is it better now?

xtqqczze · 2026-09-22T20:57:32Z

+    (HardwareFeature::Sse2, detect_sse2),
+];
+
+// bytecount's aarch64 SIMD code, used by wc, is only built for little-endian


uucore is a separately published crate, so what wc builds isn't really its concern; these features also appear to be used by cksum. I'd err on the side of portability unless little-endian is an actual requirement of the detection itself.

So what would you suggest as a comment here?

So removing target_endian?

So removing target_endian?

@sylvestre wdyt?

github-actions · 2026-09-22T21:40:50Z

GNU testsuite comparison:

Skipping an intermittent issue tests/date/resolution (passes in this run but fails in the 'main' branch)

sylvestre · 2026-09-23T18:47:48Z

+    (HardwareFeature::Sse2, detect_sse2),
+];
+
+// bytecount's aarch64 SIMD code, used by wc, is only built for little-endian


is bytecount really the reason? detect_asimd was already little-endian only before this pr

I am not sure about the historic context of these. I'm also wondering what's the reason... The actual direct reason here is detect_asimd for little-endian has been gone below... and I am not sure if this (cleaning up detect_avx512 or detect_asimd) is a good design. See my comment above. I would personally prefer to tight the scope of this PR to cksum only.

sylvestre · 2026-09-23T18:48:02Z

+            .succeeds()
+            .stdout_is_fixture("crc_single_file.expected")
+            .stderr_str_check(|stderr| {
+                stderr == "using vmull hardware support\n"


accepting both strings makes the check pretty thin, can't we at least assert there is a single line?

stderr == "some string" already asserted it's a single line.

sylvestre · 2026-09-23T18:48:09Z

+    }
+
+    #[test]
+    #[cfg(not(any(target_arch = "x86", target_arch = "x86_64", target_arch = "aarch64")))]


this test will never run on our CI targets, no? not sure it buys much

riscv64 CI runs this, which was the original purpose of this PR, to fix it for riscv64.

coreutils/.github/workflows/CICD.yml

Line 377 in c8675fd

- { os: ubuntu-latest , target: riscv64gc-unknown-linux-musl , features: feat_os_unix_musl , use-cross: use-cross , skip-tests: true }

sylvestre · 2026-09-23T18:48:22Z

+        print_feature("pclmul", features.has_pclmul());
+    }

    // ARM aarch64


why not gate on little-endian here too, like uucore does?

I am not sure if we should drop little endian gate. So is the decision to drop it in uucore or nor?

sylvestre · 2026-09-23T18:48:32Z

-    print_feature("avx512", features.has_avx512());
-    print_feature("avx2", features.has_avx2());
-    print_feature("pclmul", features.has_pclmul());
+    if cfg!(any(target_arch = "x86", target_arch = "x86_64")) {


we now list the arches here, in hardware.rs and in the tests. could uucore expose the features the target can report instead?

Do you mean export FEATURE_DETECTORS?

Ah I know. Working on it now

Lots of regressions appreared when I applied this, some due to previous defects but were hidden and will be triggered by this change...

I just restored the PR to be the original simple shape. I think we can do those hardware changes step by step in follow up PRs.

Signed-off-by: Zhiwei Liang <zhiwei.liang@zliang.me>

ChihweiLHBird · 2026-09-24T02:09:17Z

uucore is tooooooo complicated, and I am not an expert in this. I restored the original shape of the PR, the simple fix for cksum only. Can we can consider hardware.rs changes in the follow up PRs?

xtqqczze · 2026-09-25T11:45:43Z

I'll continue with the uucore changes in #14860.

ChihweiLHBird · 2026-09-25T15:00:53Z

I'll continue with the uucore changes in #14860.

Be aware of some regressions may exist. I am trying to address some regressions for this uucore change too, like in #14844

xtqqczze · 2026-09-25T15:13:52Z

@ChihweiLHBird I'll defer to your PR if you want to handle that?

ChihweiLHBird · 2026-09-25T15:23:26Z

@ChihweiLHBird I'll defer to your PR if you want to handle that?

No worries, feel free to keep yours

xtqqczze · 2026-09-25T15:33:22Z

@ChihweiLHBird It's just your commit right now, up to you.

ChihweiLHBird · 2026-09-25T22:31:47Z

@ChihweiLHBird It's just your commit right now, up to you.

Yep, no problem, I will put it up when the PR I mentioned above is finished. Thanks!

(Trying to achieve zero regression for each atomic commit/PR)

ChihweiLHBird marked this pull request as ready for review September 22, 2026 02:56

oech3 reviewed Sep 22, 2026

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Comment thread tests/by-util/test_cksum.rs Outdated

sylvestre reviewed Sep 22, 2026

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Comment thread tests/by-util/test_cksum.rs Outdated

ChihweiLHBird force-pushed the zhiwei/fix-cksum-debug-arch-gating branch from 5b59a8f to 6dd4e91 Compare September 22, 2026 16:40

ChihweiLHBird requested review from oech3 and sylvestre September 22, 2026 17:04

xtqqczze approved these changes Sep 22, 2026

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Comment thread src/uucore/src/lib/features/hardware.rs Outdated

Comment thread src/uucore/src/lib/features/hardware.rs Outdated

Comment thread src/uucore/src/lib/features/hardware.rs Outdated

ChihweiLHBird force-pushed the zhiwei/fix-cksum-debug-arch-gating branch 2 times, most recently from 085eff8 to 7a4574c Compare September 22, 2026 20:13

ChihweiLHBird requested a review from xtqqczze September 22, 2026 20:14

xtqqczze reviewed Sep 22, 2026

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ChihweiLHBird force-pushed the zhiwei/fix-cksum-debug-arch-gating branch from 7a4574c to c8675fd Compare September 22, 2026 20:49

xtqqczze reviewed Sep 22, 2026

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sylvestre reviewed Sep 23, 2026

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Comment thread src/uucore/src/lib/features/hardware.rs Outdated

sylvestre reviewed Sep 23, 2026

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ChihweiLHBird force-pushed the zhiwei/fix-cksum-debug-arch-gating branch from c8675fd to c3afbfd Compare September 23, 2026 20:37

ChihweiLHBird requested a review from sylvestre September 23, 2026 20:50

cksum: only report x86 hardware features on x86 targets

9d0fbc5

Signed-off-by: Zhiwei Liang <zhiwei.liang@zliang.me>

ChihweiLHBird force-pushed the zhiwei/fix-cksum-debug-arch-gating branch from c3afbfd to 9d0fbc5 Compare September 24, 2026 02:07

ChihweiLHBird mentioned this pull request Sep 24, 2026

uucore: only honour the last glibc.cpu.hwcaps setting, case-sensitively #14844

Merged

sylvestre merged commit a5080ba into uutils:main Sep 25, 2026
101 checks passed

ChihweiLHBird deleted the zhiwei/fix-cksum-debug-arch-gating branch September 25, 2026 05:56

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ChihweiLHBird commented Sep 22, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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Summary

Example (assuming non-x86 arch)

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xtqqczze commented Sep 22, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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oech3 commented Sep 22, 2026

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codspeed Bot commented Sep 22, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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Merging this PR will not alter performance

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