Xilinx asu ecc standalone - #11053

Merged

JacobBarthelmeh merged 17 commits into

wolfSSL:masterfrom

night1rider:Xilinx-ASU-ECC-standalone

Aug 24, 2026

Commits on Aug 19, 2026

Xilinx Versal Gen2 ASU port: ECC, ECDH, ECIES and EdDSA offload
night1rider
committed
fe30f3f
benchmark: AES IV and CCM nonce sweeps, ECC curve sweep and CSV HW/SW column
night1rider
committed
d7c7cb6
benchmark: run Ed448 and the DRBG through the device id so both can be compared
night1rider
committed
e4bc968
benchmark: add AES key wrap and padded key wrap benchmarks
night1rider
committed
f71ee94
Xilinx Versal Gen2 ASU ECIES: accept the default context, not just the named roles
night1rider
committed
4426bf9
benchmark: keep the AES-CCM nonce sweep labels alive for the stats list
night1rider
committed
c42b8e9
benchmark: keep the GMAC iv16 label alive for the stats list
night1rider
committed
54cc8f0
benchmark: skip AES-CCM nonce and block size pairs the length field cannot encode
night1rider
committed
e5a6af1
Xilinx Versal Gen2 ASU: add a port README
night1rider
committed
0b16211
Xilinx Versal Gen2 ASU: require a private key before offloading ECDSA sign, ECDH and ECIES decrypt
night1rider
committed
5d9b2e0
benchmark: build the AES key wrap benchmarks only where the _ex API exists
night1rider
committed
c72ae34

Commits on Aug 20, 2026

Commits on Aug 21, 2026