espressif: add ESP32-C5 support and the ESP32-C5-DevKitC-1-N8R8 board

ports/espressif/Makefile

@@ -402,6 +402,29 @@ CHIP_COMPONENTS = \
 	esp_hal_twai \
 	esp_hal_usb
 
+else ifeq ($(IDF_TARGET),esp32c5)
+LDFLAGS += \
+	-Tesp32c5.rom.phy.ld \
+	-Tesp32c5.rom.pp.ld \
+	-Tesp32c5.rom.net80211.ld \
+	-Tesp32c5.rom.libc.ld \
+	-Tesp32c5.rom.version.ld \
+	-Tesp32c5.rom.coexist.ld \
+	-Tesp32c5.rom.heap.ld \
+	-Tesp32c5.rom.systimer.ld \
+	-Trom.wdt.ld
+
+CHIP_COMPONENTS = \
+	esp_driver_tsens \
+	esp_driver_usb_serial_jtag \
+	esp_hal_dma \
+	esp_hal_i2s \
+	esp_hal_pcnt \
+	esp_hal_pmu \
+	esp_hal_rmt \
+	esp_hal_twai \
+	esp_hal_usb
+
 else ifeq ($(IDF_TARGET),esp32c6)
 LDFLAGS += \
 	-Tesp32c6.rom.phy.ld \
@@ -565,6 +588,8 @@ else ifeq ($(IDF_TARGET),esp32c2)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C2
 else ifeq ($(IDF_TARGET),esp32c3)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C3
+else ifeq ($(IDF_TARGET),esp32c5)
+CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C5
 else ifeq ($(IDF_TARGET),esp32c6)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C6
 else ifeq ($(IDF_TARGET),esp32c61)
@@ -912,6 +937,7 @@ ifneq ($(CIRCUITPY_BLEIO_NATIVE),0)
 	BLE_IMPL_esp32s3 := esp32c3
 	BLE_IMPL_esp32c2 := libble
 	BLE_IMPL_esp32c3 := esp32c3
+	BLE_IMPL_esp32c5 := libble
 	BLE_IMPL_esp32c6 := libble
 	BLE_IMPL_esp32c61 := libble
 	BLE_IMPL_esp32h2 := libble
@@ -1006,6 +1032,8 @@ else ifeq ($(IDF_TARGET),esp32c2)
 BOOTLOADER_OFFSET = 0x0
 else ifeq ($(IDF_TARGET),esp32c3)
 BOOTLOADER_OFFSET = 0x0
+else ifeq ($(IDF_TARGET),esp32c5)
+BOOTLOADER_OFFSET = 0x2000
 else ifeq ($(IDF_TARGET),esp32c6)
 BOOTLOADER_OFFSET = 0x0
 else ifeq ($(IDF_TARGET),esp32c61)

ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r8/board.c

@@ -0,0 +1,9 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "supervisor/board.h"
+
+// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r8/mpconfigboard.h

@@ -0,0 +1,17 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#pragma once
+
+// Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "ESP32-C5-DevKitC-1-N8R8"
+#define MICROPY_HW_MCU_NAME         "ESP32C5"
+
+#define MICROPY_HW_NEOPIXEL         (&pin_GPIO27)
+
+#define DEFAULT_UART_BUS_RX         (&pin_GPIO12)
+#define DEFAULT_UART_BUS_TX         (&pin_GPIO11)

ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r8/mpconfigboard.mk

@@ -0,0 +1,12 @@
+CIRCUITPY_CREATOR_ID = 0x000C303A
+CIRCUITPY_CREATION_ID = 0x00C50001
+
+IDF_TARGET = esp32c5
+
+CIRCUITPY_ESP_FLASH_MODE = dio
+CIRCUITPY_ESP_FLASH_FREQ = 80m
+CIRCUITPY_ESP_FLASH_SIZE = 8MB
+
+CIRCUITPY_ESP_PSRAM_SIZE = 8MB
+CIRCUITPY_ESP_PSRAM_MODE = qio
+CIRCUITPY_ESP_PSRAM_FREQ = 40m

ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r8/pins.c

@@ -0,0 +1,40 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "shared-bindings/board/__init__.h"
+
+static const mp_rom_map_elem_t board_module_globals_table[] = {
+    CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
+
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+
+    { MP_ROM_QSTR(MP_QSTR_IO23), MP_ROM_PTR(&pin_GPIO23) },
+    { MP_ROM_QSTR(MP_QSTR_IO24), MP_ROM_PTR(&pin_GPIO24) },
+    { MP_ROM_QSTR(MP_QSTR_IO25), MP_ROM_PTR(&pin_GPIO25) },
+    { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_IO27), MP_ROM_PTR(&pin_GPIO27) },
+    { MP_ROM_QSTR(MP_QSTR_IO28), MP_ROM_PTR(&pin_GPIO28) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO27) },
+
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO12) },
+
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r8/sdkconfig

@@ -0,0 +1,14 @@
+#
+# Espressif IoT Development Framework Configuration
+#
+#
+# Component config
+#
+#
+# LWIP
+#
+# end of LWIP
+
+# end of Component config
+
+# end of Espressif IoT Development Framework Configuration

ports/espressif/common-hal/analogbufio/BufferedIn.c

@@ -33,7 +33,7 @@
 #elif defined(CONFIG_IDF_TARGET_ESP32S2)
 #define ADC_RESULT_BYTE     2
 #define ADC_CONV_LIMIT_EN   0
-#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) || defined(CONFIG_IDF_TARGET_ESP32C61)
+#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) || defined(CONFIG_IDF_TARGET_ESP32C61)
 #define ADC_RESULT_BYTE     4
 #define ADC_CONV_LIMIT_EN   0
 #elif defined(CONFIG_IDF_TARGET_ESP32S3)

ports/espressif/common-hal/analogio/AnalogIn.c

@@ -30,6 +30,8 @@
 #define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32C3)
 #define DATA_WIDTH          ADC_BITWIDTH_12
+#elif defined(CONFIG_IDF_TARGET_ESP32C5)
+#define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
 #define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32C61)

ports/espressif/common-hal/espidf/__init__.c

@@ -27,7 +27,8 @@
 static size_t psram_size_usable(void) {
     #ifdef CONFIG_SPIRAM
     /* PSRAM chip may be larger than the size we can map into address space */
-    #ifdef CONFIG_IDF_TARGET_ESP32P4
+    #if defined(CONFIG_IDF_TARGET_ESP32P4) || defined(CONFIG_IDF_TARGET_ESP32C5)
+    // These targets don't define SOC_EXTRAM_DATA_SIZE.
     size_t s = esp_psram_get_size();
     #else
     size_t s = MIN(esp_psram_get_size(), SOC_EXTRAM_DATA_SIZE);

ports/espressif/common-hal/microcontroller/Pin.c

@@ -136,6 +136,32 @@ static const uint64_t pin_mask_reset_forbidden =
     #endif
     #endif // ESP32C3
 
+    #if defined(CONFIG_IDF_TARGET_ESP32C5)
+    // Never ever reset pins used to communicate with SPI flash.
+    // ports/espressif/esp-idf/components/esp_hal_gpspi/esp32c5/include/soc/spi_pins.h
+    GPIO_SEL_16 |         // MSPI_IOMUX_PIN_NUM_CS0 (flash)
+    GPIO_SEL_17 |         // MSPI_IOMUX_PIN_NUM_MISO
+    GPIO_SEL_18 |         // MSPI_IOMUX_PIN_NUM_WP
+    GPIO_SEL_19 |         // VDD_SPI (powers the in-module flash)
+    GPIO_SEL_20 |         // MSPI_IOMUX_PIN_NUM_HD
+    GPIO_SEL_21 |         // MSPI_IOMUX_PIN_NUM_CLK
+    GPIO_SEL_22 |         // MSPI_IOMUX_PIN_NUM_MOSI
+    #if CIRCUITPY_ESP_USB_SERIAL_JTAG
+    // Never ever reset serial/JTAG communication pins. On C5, gpio_ll_func_sel()
+    // on either clears USB_SERIAL_JTAG.conf0.usb_pad_enable, killing the USB pads.
+    GPIO_SEL_13 |         // USB D- (USB_INT_PHY0_DM_GPIO_NUM)
+    GPIO_SEL_14 |         // USB D+ (USB_INT_PHY0_DP_GPIO_NUM)
+    #endif
+    #if defined(CONFIG_SPIRAM)
+    GPIO_SEL_15 |         // MSPI_IOMUX_PIN_NUM_CS1 (PSRAM); keep if PSRAM in use
+    #endif
+    #if defined(CONFIG_ESP_CONSOLE_UART_DEFAULT) && CONFIG_ESP_CONSOLE_UART_DEFAULT && CONFIG_ESP_CONSOLE_UART_NUM == 0
+    // Never reset debug UART/console pins.
+    GPIO_SEL_11 |
+    GPIO_SEL_12 |
+    #endif
+    #endif // ESP32C5
+
     #if defined(CONFIG_IDF_TARGET_ESP32C6)
     // Never ever reset pins used to communicate with SPI flash.
     GPIO_SEL_24 |         // SPICS0

ports/espressif/common-hal/microcontroller/Processor.c

@@ -65,6 +65,10 @@ static uint32_t get_valid_cpu_frequency(uint32_t requested_freq_mhz) {
     uint32_t valid_cpu_frequencies[] = {20, 40, 80, 120};
     #elif defined(CONFIG_IDF_TARGET_ESP32H2)
     uint32_t valid_cpu_frequencies[] = {32, 48, 64, 96};
+    #elif defined(CONFIG_IDF_TARGET_ESP32C5)
+    // C5's 48 MHz crystal does not divide evenly to 20 or 24 MHz, both of
+    // which esp_pm_configure() rejects.
+    uint32_t valid_cpu_frequencies[] = {40, 80, 160, 240};
     #else
     uint32_t valid_cpu_frequencies[] = {20, 40, 80, 160, 240};
     #endif
@@ -126,7 +130,7 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
     uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_0_REG);
     #elif defined(CONFIG_IDF_TARGET_ESP32C2)
     uint32_t mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA0_REG);
-    #elif defined(CONFIG_IDF_TARGET_ESP32C61)
+    #elif defined(CONFIG_IDF_TARGET_ESP32C61) || defined(CONFIG_IDF_TARGET_ESP32C5)
     uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS0_REG);
     #else
     uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_0_REG);
@@ -147,7 +151,7 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
     mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_1_REG);
     #elif defined(CONFIG_IDF_TARGET_ESP32C2)
     mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA1_REG);
-    #elif defined(CONFIG_IDF_TARGET_ESP32C61)
+    #elif defined(CONFIG_IDF_TARGET_ESP32C61) || defined(CONFIG_IDF_TARGET_ESP32C5)
     mac_address_part = REG_READ(EFUSE_RD_MAC_SYS1_REG);
     #else
     mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_1_REG);

ports/espressif/common-hal/microcontroller/__init__.c

@@ -33,6 +33,9 @@
 #elif defined(CONFIG_IDF_TARGET_ESP32C3)
 #include "soc/rtc_cntl_reg.h"
 #include "esp32c3/rom/rtc.h"
+#elif defined(CONFIG_IDF_TARGET_ESP32C5)
+#include "soc/lp_aon_reg.h"
+#include "esp32c5/rom/rtc.h"
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
 #include "soc/lp_aon_reg.h"
 #include "esp32c6/rom/rtc.h"
@@ -86,7 +89,7 @@ void common_hal_mcu_enable_interrupts(void) {
 void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
     switch (runmode) {
         case RUNMODE_UF2:
-            #if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)
+            #if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)
             mp_arg_error_invalid(MP_QSTR_run_mode);
             #else
             // 0x11F2 is APP_REQUEST_UF2_RESET_HINT & is defined by TinyUF2

ports/espressif/esp-idf-config/sdkconfig-esp32c5.defaults

@@ -0,0 +1,54 @@
+#
+# Espressif IoT Development Framework Configuration
+#
+#
+# Component config
+#
+#
+# Bluetooth
+#
+CONFIG_BT_ENABLED=y
+CONFIG_BT_NIMBLE_ENABLED=y
+#
+# NimBLE Options
+#
+CONFIG_BT_NIMBLE_LOG_LEVEL_NONE=y
+CONFIG_BT_NIMBLE_NVS_PERSIST=y
+#
+# Memory Settings
+#
+CONFIG_BT_NIMBLE_TRANSPORT_ACL_FROM_LL_COUNT=20
+CONFIG_BT_NIMBLE_TRANSPORT_EVT_SIZE=70
+# end of Memory Settings
+
+CONFIG_BT_NIMBLE_EXT_ADV=y
+# end of NimBLE Options
+
+# end of Bluetooth
+
+#
+# Driver Configurations
+#
+#
+# PCNT Configuration
+#
+CONFIG_PCNT_CTRL_FUNC_IN_IRAM=y
+# end of PCNT Configuration
+
+# end of Driver Configurations
+
+#
+# Wi-Fi
+#
+CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=4
+# end of Wi-Fi
+
+#
+# mbedTLS
+#
+# CONFIG_MBEDTLS_HARDWARE_SHA is not set
+# end of mbedTLS
+
+# end of Component config
+
+# end of Espressif IoT Development Framework Configuration

ports/espressif/mpconfigport.h

@@ -29,6 +29,8 @@
 #ifndef CIRCUITPY_BOOT_BUTTON
   #if defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32C61)
     #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO9)
+  #elif defined(CONFIG_IDF_TARGET_ESP32C5)
+    #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO28)
   #elif !defined(CONFIG_IDF_TARGET_ESP32)
     #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
   #endif

ports/espressif/mpconfigport.mk

@@ -11,6 +11,9 @@ CROSS_COMPILE = riscv32-esp-elf-
 else ifeq ($(IDF_TARGET),esp32c3)
 IDF_TARGET_ARCH = riscv
 CROSS_COMPILE = riscv32-esp-elf-
+else ifeq ($(IDF_TARGET),esp32c5)
+IDF_TARGET_ARCH = riscv
+CROSS_COMPILE = riscv32-esp-elf-
 else ifeq ($(IDF_TARGET),esp32p4)
 IDF_TARGET_ARCH = riscv
 CROSS_COMPILE = riscv32-esp-elf-
@@ -188,6 +191,37 @@ CIRCUITPY_SDIOIO = 0
 CIRCUITPY_USB_DEVICE = 0
 CIRCUITPY_ESP_USB_SERIAL_JTAG ?= 1
 
+#### esp32c5 ##########################################################
+else ifeq ($(IDF_TARGET),esp32c5)
+# Modules
+CIRCUITPY_ESPCAMERA = 0
+CIRCUITPY_ESPULP = 0
+CIRCUITPY_MEMORYMAP = 0
+CIRCUITPY_RGBMATRIX = 0
+
+# TWAI-FD generation, needs a new canio backend
+CIRCUITPY_CANIO = 0
+
+# No capacitive touch peripheral
+CIRCUITPY_ALARM_TOUCH = 0
+CIRCUITPY_TOUCHIO_USE_NATIVE = 0
+
+# No DAC
+CIRCUITPY_AUDIOIO = 0
+
+# No I2S peripheral PDM-to-PCM hardware support
+CIRCUITPY_AUDIOBUSIO_PDMIN = 0
+
+# No LCD_CAM peripheral, so no esp_lcd_new_i80_bus()
+CIRCUITPY_PARALLELDISPLAYBUS = 0
+
+# No SDMMC
+CIRCUITPY_SDIOIO = 0
+
+# Features
+CIRCUITPY_USB_DEVICE = 0
+CIRCUITPY_ESP_USB_SERIAL_JTAG ?= 1
+
 #### esp32c6 ##########################################################
 else ifeq ($(IDF_TARGET),esp32c6)
 # Modules