arch/arm/stm32h5: Add USART wake from low power

[liam-geotab]

Summary

Support USART waking from low power modes (common stm32, stm32h5 only supported for now), allow keeping HSI running in STOP mode (stm32h5), allow specifying clock source for USARTs (stm32h5), add some missing register and field definitions.

stm32 common Kconfigs:
Add common STM32 UART config options USARTx_WAKE_FROM_LOW_POWER and USARTx_WUS for USART to cause wake up from low power modes. Only supported by stm32h5 for now.

stm32h5 board configs:
Allow board.h to choose the clock source of each USART.
Allow board.h to express that HSI should continue running in low power modes.

stm32h5 RCC:
Set the clock source for each USART if specified in the board configs (STM32_RCC_CCIPR1_USARTxSEL).
Keep HSI on in STOP mode if specified in the board configs (STM32_BOARD_HSIKERON_ENABLE).

stm32h5 serial driver:
Use the new USARTx_WAKE_FROM_LOW_POWER and USARTx_WUS in stm32h5 serial driver to wake from low power modes.
Use the USART clock source specified by board configs.
Enable FIFOs.
Clear UE bit before initialization.

Revert a STM32_OTP_BASE define which was duplicated by a separate independent contribution. cc @darrylring.

Impact

It adds new common stm32 configs and stm32h5 board.h defines which, if removed, could break users of them.

stm32_lowputc.c awareness of custom clock source is missing.

Testing

nucleo-h563zi:nsh with the following enabled:

CONFIG_USART3_WAKE_FROM_LOW_POWER=y
CONFIG_PM=y
CONFIG_ARCH_IRQPRIO=y

diff --git a/arch/arm/src/stm32h5/stm32_idle.c b/arch/arm/src/stm32h5/stm32_idle.c
index 5cc08c4759..93baf43044 100644
--- a/arch/arm/src/stm32h5/stm32_idle.c
+++ b/arch/arm/src/stm32h5/stm32_idle.c
@@ -36,6 +36,8 @@
 #include "chip.h"
 #include "stm32_rcc.h"
 #include "arm_internal.h"
+#include "stm32_pm.h"
+#include "stm32_rcc.h"
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -57,7 +59,23 @@
  * Private Functions
  ****************************************************************************/
 
-#define up_idlepm()
+static void up_idlepm(void)
+{
+  irqstate_t flags;
+
+  up_prioritize_irq(STM32_IRQ_USART3, NVIC_SYSH_HIGH_PRIORITY);
+
+  flags = enter_critical_section();
+
+  stm32_pmstop(false);
+
+  stm32_clockenable();
+
+  leave_critical_section(flags);
+
+  syslog(LOG_DEBUG, "woke up");
+  up_mdelay(100);
+}
 
 /****************************************************************************
  * Public Functions
diff --git a/boards/arm/stm32h5/nucleo-h563zi/include/board.h b/boards/arm/stm32h5/nucleo-h563zi/include/board.h
index 187c1bbf6c..b303abc2bf 100644
--- a/boards/arm/stm32h5/nucleo-h563zi/include/board.h
+++ b/boards/arm/stm32h5/nucleo-h563zi/include/board.h
@@ -138,6 +138,9 @@
 
 #else
 
+/* Keep HSI running during STOP mode */
+#define STM32_BOARD_HSIKERON_ENABLE
+
 #define STM32_BOARD_USEHSI       1
 #define STM32_BOARD_HSIDIV       RCC_CR_HSIDIV(1)
 #define STM32_HSI_FREQUENCY      32000000ul
@@ -364,6 +367,9 @@
 #define GPIO_USART3_RX   GPIO_USART3_RX_4    /* PD9 */
 #define GPIO_USART3_TX   GPIO_USART3_TX_4    /* PD8 */
 
+/* UART3 clock source: HSI */
+#define STM32_RCC_CCIPR1_USART3SEL RCC_CCIPR1_USART3SEL_HSIKERCK
+
 /* USART2 GPIOs *************************************************************/
 
 #define GPIO_USART2_RX   GPIO_USART2_RX_2    /* PD6 */

Pressing keys causes USART to wake the chip from STOP mode. As you can see from "BCG", the first 'A'
printed progress is missing because stm32_lowputc.c is not aware that USART is clocked from HSI yet.

BCG

NuttShell (NSH) NuttX-13.0.1
nsh> woke up
swoke up
swoke up
wwoke up
wwoke up
wwoke up
qwoke up
qwoke up

[github-actions]

MemBrowse Memory Report

No memory changes detected for:

• arduino-mega2560
• esp32-devkitc
• hifive1-revb
• mirtoo
• qemu-armv8a
• qemu-intel64
• rx65n-rsk2mb
• s698pm-dkit
• stm32-nucleo-f103rb

[darrylring]

Sorry about that. I did the MPU work as part of my own OTP work, and left that define in from my test case. It should have occurred to me when I reviewed your PR.